http://madrona.ca/e/pdp11hack/index.html
Since that time, many people have made variations on Brent Hilpert design. One of my sources of inspiration is:
https://www.5volts.ch/pages/pdp11hack/
My design has the following features, but I never instantiated it:
* Much more RAM, 512KW
* The data bus is buffered (it is not in other designs)
* It has a GPIO (65C22) (because why not?)
* It can write into the upper byte
* The UART is the 6402, as in Brent Hilpert schematics, but the address is fully decoded to enable using a DEC OS.
* It has 5 switches to test/learn to single-step the memory accesses, the HALT, interrupts, or make a reset
* The boot configuration could be set up with micro-switches
JPLeRouzic•2h ago
http://madrona.ca/e/pdp11hack/index.html
Since that time, many people have made variations on Brent Hilpert design. One of my sources of inspiration is:
https://www.5volts.ch/pages/pdp11hack/
My design has the following features, but I never instantiated it:
* Much more RAM, 512KW
* The data bus is buffered (it is not in other designs)
* It has a GPIO (65C22) (because why not?)
* It can write into the upper byte
* The UART is the 6402, as in Brent Hilpert schematics, but the address is fully decoded to enable using a DEC OS.
* It has 5 switches to test/learn to single-step the memory accesses, the HALT, interrupts, or make a reset
* The boot configuration could be set up with micro-switches