> There was some design oddness that plagued early MIPS and SPARC that future architectures avoided.
I wrote a Ghidra extension that can export relocatable object files. The MIPS analyzer for it is the hardest algorithmic challenge I've ever tackled, by far. The quirks of that architecture offer an endless supply of frustrating edge cases.
It uses split HI16/LO16 relocations because the earliest versions couldn't use literal pools due to a lack of PC-relative loads/stores, so figuring out pointers within the instruction stream require elaborate register dependency and code block graph traversal. Branch delay slots further scramble that instruction stream because compilers will attempt to stuff them with useful instructions. The System V ABI reference documentation for MIPS is woefully outdated and incomplete, with various extensions left undocumented.
The x86 analyzer in comparison is very straightforward. I haven't tried to add support for another RISC instruction set, but I struggle to think of one that would be even harder to deal with than MIPS (except SPARC, maybe).
sitzkrieg•2h ago
there is still mips mcus in some products here and there. some router manufacturers have already started using riscv and arm (ofc). i tend to find old mipsel marvell mcus in settops and older cable modems, and really small things.
microchip still has mips based pic32mz as well. i still use this in some automotive design
frollogaston•2h ago
UC Berkeley's intro to computer architecture course still uses MIPS for projects and exam questions.
Ar-Curunir•2h ago
CS61C uses RISC-V now.
frollogaston•2h ago
Oh, cool! I remember hearing a lot about RISC-V back then, and it's also from Berkeley, so makes sense.
bitwize•1h ago
Makes sense. Isn't MIPS like a commercial variant of RISC-I?
chasil•1h ago
IIRC, Berkeley RISC was mainly SPARC, although it was also the AMD 29k.
Stanford was MIPS.
marnett•2h ago
This was true of University of Maryland back in 2015 when I was there…
VoidWhisperer•8m ago
Rochester Institute of Technology had MIPS in their CSCI-250 Concepts of Computer Systems class. I remember debugging my final project for the semester being a bit of a nightmare because it was a much larger MIPS assembly project, and debugging it used gdb if I remember correctly..
Not sure if they still use it as I graduated from there back in 2020
drewg123•55m ago
The first *nix workstation I ever sat in front of (at an undergrad CS lab in the early 90s) was a DECStation 2100 with a MIPS R2000.. Sadly they were replaced by Sparcs when Sun made an exclusive deal with our University.
saidinesh5•3h ago
Did they all move onto using Arm these days or is RISC-V gaining traction there too these days?
chasil•3h ago
https://gf.com/gf-press-release/globalfoundries-to-acquire-m...
Edit: the article starts with the above press release.
It spends substantial time on the Nintendo 64, but not much on the "Emotion Engine" of the Sony PS2 (which was a more advanced MIPS CPU).
https://en.wikipedia.org/wiki/Emotion_Engine
There was some design oddness that plagued early MIPS and SPARC that future architectures avoided.
https://www.jwhitham.org/2016/02/risc-instruction-sets-i-hav...
One place where everyone saw the work of MIPS was the original movie Jurassic Park, on an SGI Crimson.
https://en.wikipedia.org/wiki/SGI_Crimson
meepmorp•2h ago
chasil•1h ago
It appears to have been the Godson 3, perhaps the 4000 series.
https://en.wikipedia.org/wiki/Loongson#Godson_3_/_Loongson_3...
boricj•1h ago
I wrote a Ghidra extension that can export relocatable object files. The MIPS analyzer for it is the hardest algorithmic challenge I've ever tackled, by far. The quirks of that architecture offer an endless supply of frustrating edge cases.
It uses split HI16/LO16 relocations because the earliest versions couldn't use literal pools due to a lack of PC-relative loads/stores, so figuring out pointers within the instruction stream require elaborate register dependency and code block graph traversal. Branch delay slots further scramble that instruction stream because compilers will attempt to stuff them with useful instructions. The System V ABI reference documentation for MIPS is woefully outdated and incomplete, with various extensions left undocumented.
The x86 analyzer in comparison is very straightforward. I haven't tried to add support for another RISC instruction set, but I struggle to think of one that would be even harder to deal with than MIPS (except SPARC, maybe).
sitzkrieg•2h ago
microchip still has mips based pic32mz as well. i still use this in some automotive design