I'm exploring running SGI IRIX natively on N64 hardware with a budget dual-interface architecture (~$150): a Raspberry Pi CM5 ($90-120) acts as orchestrator, connecting its GPIOs directly to the N64's cartridge slot to provide boot ROM while simultaneously serving as a remote 8-16GB LPDDR5 RAM server through PCIe Gen2 to a cheap surplus IBM FPGA board ($20-30) that plugs into the memory expansion port and handles RDRAM protocol timing. The VR4300 runs IRIX natively with the CM5 providing initial boot code through the cartridge interface, while the FPGA bridges the expansion port to CM5's RAM for the main memory pool (~1-2μs latency via PCIe). This dual-pathway approach would solve both boot orchestration and memory expansion while keeping the VR4300's caches hiding most remote memory latency - I think.

— has anyone implemented similar dual-interface architectures / embedded MIPS systems?

To run SGI IRIX natively on Nintendo 64 hardware, we would be using MAME as a development guide—the N64's VR4300 (MIPS III with MMU/TLB, architecturally similar to MAME's successfully-emulated R4600) runs IRIX with minor patches while a Raspberry Pi CM5 ($90-120) orchestrates via dual interfaces: its GPIOs directly connect to the N64 cartridge slot providing boot ROM extracted from MAME's working SGI Indy emulation, while simultaneously serving 8-16GB of RAM through PCIe Gen2 to a cheap surplus IBM FPGA board ($20-30) that handles RDRAM protocol timing on the expansion port. MAME's open-source R4600 emulation provides a complete reference implementation showing exactly what hardware features IRIX requires, which patches are necessary for VR4300 differences (TLB size, clock speed, cache), and validates the minimal device set needed for boot

— your thoughts?