Well, I have my doubts that big endian will ever truly die. Is anyone ready to take on globally switching network byte order? Maybe we should start adding a magic number to every packet so we can tell which ordering it is using. Ha

> Remember: your mom picked up your dirty laundry from your floor, and software people are like the super-moms of the world.

Lots of Linus gold in this reply, but this one really made me chuckle.

On one hand, it's just Linus Torvalds calling it like he sees it, without giving too much considerations to things he deems less important, like, say, how the recipients of his message might feel.

On the other hand, as always, he makes good points, hard to refute.

> - only do aligned memory accesses

TriCore 16/32bit reads/writes are like that. So doing something like

uint8_t array8[] = {bytes here}; uint32_t i = *(array8 + 1);

will crash your processor and force reset it, because you just tried to make a read on odd address (assuming that array is aligned on even address)

> - expose your pipeline details in the ISA

Again TriCore and division - DVINIT then repeatedly poke DVSTEP and then call DVADJ to store result into a register...

Or SH2A architecture where you are always grouping instructions by 2, processed in parallel I suppose?