Having everybody connected leads to homogenization of culture in some ways
For example, I've taken code optimized for Xilinx, ran it for another vendor, and resource count ballooned because stuff that was built-in/free on one wasn't on the other. It's a lot of work to truly make generic code and usually just means switching out modules per vendor.
If you have a ROM, it's not "no memory".
Needlessly pedantic!
I thought this was pretty cool but the first video didn't play. All this write up and I really just want to see the damn demo in action first! (Edit: reloaded the page and it worked. I still would like to see it on rela hardware!)
Bucket-brigade delay lines?
But I'm not really familiar with what that is.
Imagine a pair of MOSFETs connected to a pair of capacitors, and a bunch of those joined together in a chain. All the gates of each one of the pair of MOSFETS are connected together, giving you a "left" and "right" clock input.
When you put a signal in if you pulse the "left" and "right" inputs, it'll store the signal voltage in one capacitor, then pass it off to the next capacitor in turn, like old-timey firefighter handing buckets of water down a line of people.
They used to use this for delaying audio signals before digital memory and analogue to digital conversion was cheap enough to use.
You are going to have a hard time doing analog signal processing with memoryless elements. In the linear domain all you can do is apply gain and mix signals together. If you work with memoryless nonlinearities you can do waveshaping, which is generally only useful when applied to special signals (e.g. sine waves).
Any time you want to do frequency-dependent behavior (filtering, oscillation) you need energy storing elements, usually capacitors, sometimes inductors. A capacitor is just like a register: it stores charge, similarly, inductors store energy in the magnetic field. Needless to say these devices are not memoryless. In fact, since the quantity that they remember is a continuous variable, they store a lot of information.
I have no qualms saying a stateful device can have no memory in the addressable memory sense.
I'm not sure where addressable comes in. A digital register is literally a flip-flop (or a bank of flip-flops). It's wired into a larger circuit the same way that a capacitor is.
if you have pedantry, it's also not "no memory"
> 1024x32 Commercial SRAM > CF_SRAM_1024x32 > Commercial SRAM: 1024 words x > 32 bits (4KB) with Wishbone Bus interface > Area: 0.17mm² > GPIOs: 0 > License: Commercial - $2500 per project
There are many bad things about LLMs, but a benign shift in popular language usage isn't one of them.
Organic shifts in language are fine. What is not fine is Big Money (which most forms of AI are) manipulating society at large - and that's not just the AI companies' doing. Think of Tiktok leading people to say "unalive" instead of the various clear words before (e.g. kill, murder, executed, run over by car, mauled to death by animal).
but without the craft of a good advertising slogan. So worse!
Culture contaminates.
x=CPU y=Memory Z=4k gates
The project has a narrow scope of use-cases. =3
Analog i/o pins: definitely limited, even if you purchase the highest option available (6).
ok, but silicon is doped so it's slightly impure, and CPUs are also silicon and memory is also silicon.
you actually meant "4K gates, no clock, no synchronization, no timing" and maybe a little "not exactly sure when the output is rea... is rea... is ready"
Oh shit, this prompted me to check and turns out TinyTapeout is back to life! https://tinytapeout.com/
The HAKMEM sine/cosine generator is such an elegant choice - it's numerically stable in fixed-point and requires only adds and bit-shifts. Perfect for hardware. I used a similar approach once for generating test patterns in an FPGA.
The fact that you can iterate on this in simulation, then deploy to actual silicon via Tiny Tapeout for $150 is honestly mind-blowing. We're living in the future.
CORDIC: - Iterative algorithm (needs multiple clock cycles) - Accuracy improves with more iterations - Generates both magnitude and phase - Typical hardware implementation: 12-16 iterations for decent precision
HAKMEM (Item 149): - Single-cycle computation (just two adds per step) - Uses the recurrence: x' = x - εy, y' = y + εx - Accuracy depends on word width and epsilon choice - Numerically stable in exact arithmetic if ε² < 2
It's really cool but it doesn't seem practical at all. They aren't setting up print runs, just one-offs (https://tinytapeout.com/faq/#how-many-chips-will-i-receive-c...) and $150 could get you... many orders of magnitude more power than that.
... For that matter, apparently the microcontroller in the dev kit is a https://en.wikipedia.org/wiki/RP2040 , which seems like a beast in comparison. And it's still available for less than $1 USD on PiShop.
Remind me to participate in the next one!
glimshe•1mo ago
amelius•1mo ago
lucyjojo•1mo ago
Joel_Mckay•1mo ago
Software takes 1 year under someone smart in a production environment.
People that conflate the two... longer or more likely never.. =3
jacquesm•1mo ago
That's very funny.
Joel_Mckay•1mo ago
During a career role most have no idea "why" chips were designed and built a certain way, nor require this information to work within abstract domains.
In many ways, vibe-coders are the absurd optimization of a naive trajectory toward zero workmanship standards. =3
https://en.wikipedia.org/wiki/Five_stages_of_grief
Joel_Mckay•1mo ago
https://en.wikipedia.org/wiki/Metastability
https://en.wikipedia.org/wiki/Clock_domain_crossing