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Show HN: To Honor Sir Patrick Stewart, Enjoy the TNG Episode Guessing Game

https://tng.episodle.com/
49•francisofascii•1h ago•15 comments

Cloudflare Turnstile solver library (no headless browser required)

https://github.com/chris124567/cfsolve
85•costco•2d ago•28 comments

My favourite PowerMac is a Nintendo Wii

https://virtuallyfun.com/2026/10/29/my-favourite-powermac-is-a-nintendo-wii/
245•DHowett•8h ago•65 comments

Backdoor in Claude Code for VS Code extension on the Cursor Marketplace

https://phorion.io/blog/offical-claude-code-vsx-compromise/
778•_chall•18h ago•485 comments

Northflank Breached

https://status.northflank.com
362•js4ever•10h ago•274 comments

Jules Verne's Lost Novel

https://blue-continuum.com/verne-paris
81•dnetesn•5h ago•16 comments

Breaking the open web won't stop the bad bots

https://www.techpolicy.press/breaking-the-open-web-wont-stop-the-bad-bots/
189•raybb•3d ago•80 comments

Infinite Mac: BeOS

https://blog.persistent.info/2026/10/infinite-mac-beos.html
105•ecliptik•6h ago•39 comments

The $6.3B Binance hack was pulled off in just 20 minutes

https://www.wired.com/story/the-dollar63-billion-binance-hack-was-pulled-off-in-just-20-minutes/
316•domhudson•12h ago•216 comments

Show HN: A working Nintendo in ~1GB of Qwen weights

https://github.com/dbreunig/nesformer
190•dbreunig•9h ago•111 comments

The oldest ice disappears and the Stone Age emerges from it

https://www.sciencenorway.no/archaeology-climate-culture/the-oldest-ice-is-disappearing-the-stone...
91•dxs•5h ago•33 comments

sanstun: A sans-IO, parallel-friendly WireGuard implementation in Rust

https://www.firezone.dev/blog/introducing-sanstun
59•wh33zle•4h ago•14 comments

Florilegium: Procedural Flowers in LaTeX

https://github.com/kevinraymond/florilegium
218•nanna•10h ago•36 comments

The federated code forge

https://tangled.org/blog/forge/
234•zlliang•10h ago•77 comments

Through Captain Jean-Luc Picard, Patrick Stewart taught us the measure of a man

https://www.bostonglobe.com/2026/10/29/metro/patrick-stewart-picard-star-trek-the-next-generation/
207•apress•5h ago•123 comments

Azure's Weakest Link – Five Full Cross-Tenant Compromises

https://www.binarysecurity.no/posts/2026/10/one-root-case
264•swq115•15h ago•53 comments

Turning a solar power system into its own backup

https://arstechnica.com/science/2026/10/turning-a-solar-power-system-into-its-own-backup/
32•PaulHoule•1d ago•12 comments

Linode Security Incident

https://status.linode.com/incidents/nt58zhx3pmgm
145•lacoolj•3h ago•75 comments

Building an AI-native engineering org

https://twitter.com/sgondala2/status/2115832070274723875
110•sgondala_ycapp•1d ago•143 comments

Tree-mounted machines connect to web app to let users knock on wood remotely

https://www.designboom.com/technology/tree-mounted-machines-web-app-users-knock-on-wood-remotely/
64•surprisetalk•3d ago•28 comments

Cisco gives engineer unlimited AI tokens to rewrite legacy code

https://fortune.com/2026/10/30/cisco-president-jeetu-patel-gen-z-27-year-old-unlimited-ai-tokens-...
102•taubek•11h ago•113 comments

AO3 Down for Maintenance

https://www.otwstatus.org
92•idlewords•4h ago•22 comments

Wonderful Weather: Floods and Foreboding in 17th-Century Britain

https://publicdomainreview.org/essay/wonderful-weather/
6•Thevet•2d ago•0 comments

Sleep framework: A new way for LLMs to retain knowledge in continual learning

https://research.google/blog/the-sleep-framework-a-new-way-for-llms-to-retain-knowledge-in-contin...
167•acossta•2d ago•15 comments

AI isn't replacing SREs, it's deskilling them

https://newsletter.signoz.io/p/ai-isnt-replacing-sres-its-deskilling
509•dorianniemiec•9h ago•380 comments

Trapped in the Technologist Factory

https://ideolalia.com/essays/trapped-in-the-technologist-factory.html
4•luu•2d ago•0 comments

A Pickpocket's Guide to New York

https://www.newyorker.com/magazine/2026/11/02/a-pickpockets-guide-to-new-york
53•prismatic•6h ago•7 comments

How do you take a picture of a black hole?

https://www.quantamagazine.org/how-do-you-take-a-picture-of-a-black-hole-20261029/
84•dverlaeckt80•16h ago•62 comments

Bunny CDN Security Incident

https://status.bunny.net/incidents/p6gf1by9kr7m
200•SondreDag•6h ago•40 comments

Show HN: Sketch Stadium – watch your agent play Pictionary

https://sketch.wakeshift.ai/games/q5ucru
24•ericlevine•10h ago•8 comments
Open in hackernews

How ZGC allocates memory for the Java heap

https://joelsiks.com/posts/zgc-heap-memory-allocation/
86•lichtenberger•1y ago

Comments

gopalv•1y ago
The 32x virtual memory to physical memory ratio plays into relocation and colored pointers (i.e pointers where some bits serve as flag bits).

Putting the actual data layouts in 44 bits out of 64 is a neat trick which relies on the allocator being aware of the mappings between physical and virtual addresses.

twoodfin•1y ago
When your comment and the article refer to “physical” addresses, those are physical in the context of the JVM, right? To the OS they’re virtual addresses in the JVM process space?
acchow•1y ago
Correct. ZGC has no way to escape from the virtualization by the kernel (assuming your hardware and kernel uses an MMU)
MBCook•1y ago
Thank you for the answer, I was wondering that as well.
hinkley•1y ago
In the beginning of the 32 bit revolution, when the future was here but unevenly distributed, there was a lot of talk about how 32 bit pointers would fundamentally change how people wrote code. Among other things it got rid of a bunch of odd bookkeeping, and if you don’t have to do the bookkeeping you don’t have to write the code in a way that supports it, so you can do other things.

Not too long after someone asked what sort of interesting changes 64 bit will bring. And I’ve been keeping that question in the back of my mind ever since.

Aliasing memory multiple times in order to do read or write barriers and make GC much cheaper is a pretty good one. But another one I know of is that one of the secrets of the L4 microkernel is that its IPC speed comes substantially from reducing the amount of TLB work that needs to be done to switch to another process running in a different address space. They use the same address space and only swap out the access rights which cuts the call overhead in half. It’s pretty easy to put a bunch of processes into a 64 bit address space and just throw each one a randomly located 4GB slice of RAM.

twoodfin•1y ago
Yeah, would love to see the CPU vendors invent some primitives to let user code pull those kinds of privilege isolation tricks within a single process and address space.

Something like: “From now on, code on these pages can only access data on these pages, and only return to/call into other code through these gates…”

hinkley•1y ago
Thread based seems like it at least should be possible.
ahartmetz•1y ago
I've had some ideas about avoiding format validation in IPC receivers if the data is encoded by trusted code, which is also the only code that has rights to send the IPC data / to connect to the receiver. I can't really think of an important problem that it would solve, though. DBus always validates received data, but it's not really meant or very suitable for large amounts of data anyway.
pron•1y ago
For relevant upcoming changes see Automatic Heap Sizing for ZGC: https://openjdk.org/jeps/8329758
twoodfin•1y ago
What I’m looking for is a way for a process to de/re-escalate its privileges to access memory, without an expensive context switch being required at the transition. The CPU would simply enforce different rules based on (say) the high-order bits of the instruction pointer.

Imagine a server process that wants to run some elaborate third-party content parser. It’d be great to be sure that no matter how buggy or malicious that code, it can’t leak the TLS keys.

Today, high-security architectures must use process isolation to achieve this kind of architectural guarantee, but even finely tuned IPC like L4’s is an order of magnitude slower than a predictable jump.

gpderetta•1y ago
For a brief moment Intel supported MPX which did something similar.

You can also play tricks with the virtualization hardware, bit it need kernel support.

Eventually we will get segments back again.

MarkSweep•1y ago
That would be pretty cool. Something like the Win32 function GetWriteWatch, but implemented in hardware instead of the page fault handler (I assume).

https://learn.microsoft.com/en-us/windows/win32/api/memoryap...

Or some sort of special write barrier store op-code, idk.

mike_hearn•1y ago
It exists, that's called MPKs.
twoodfin•1y ago
I don’t think MPK’s will fit the need I have. Simply: Run some arbitrary, untrusted, non-sandboxed code in the same thread with assurance it can’t read page X. When that code completes and I’m back in code I trust, X is readable again.

Is that something MPK makes possible? The doc I’ve read suggests either your process can flip permission bits or it can’t. Great for avoiding out-of-sandbox reads. But if there’s arbitrary execution happening, why can’t that code flip the access to secrets back on?

mike_hearn•1y ago
Oracle Labs has tech that does that:

https://youtu.be/T05FI93MBI8?si=EieFgujaGiW2gbO8&t=958

The trick is to do a cascading disassembly of all untrusted code you'll execute to prove it can't change the MPK register.

twoodfin•1y ago
Wow. Neat trick and exactly the kind of thing I was looking for.

Thanks!

EDIT: Looks like this is the relevant paper from the Graal team: https://www.graalvm.org/resources/articles/binsweep.pdf

jdougan•1y ago
Is that something like the memory protection scheme on the Newton OS?
nyanpasu64•1y ago
Isn't not swapping page tables during a call precisely what the KPTI mitigations had to turn off for Meltdown mitigations?