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Xiaomi-Robotics-1

https://robotics.xiaomi.com/xiaomi-robotics-1.html
62•ilreb•2h ago•13 comments

LoRA Speedrun – a public wall-clock leaderboard for fine-tuning techniques

https://github.com/Saivineeth147/lora-speedrun
38•Vineeth147•2h ago•2 comments

Show HN: I replaced a $120k bowling center system with $1,600 in ESP32s

2093•section33•16h ago•222 comments

Moonshine: Lets you stream games from your PC to any device running Moonlight

https://github.com/hgaiser/moonshine
119•wertyk•7h ago•56 comments

Korg PS-3300 is back

https://www.korg.co.uk/blogs/updates/ps3300
32•Lio•5d ago•31 comments

Claude Code uses Bun written in Rust now

https://simonwillison.net/2026/Jul/19/claude-code-in-bun-in-rust/
484•tosh•21h ago•643 comments

Orion Browser by Kagi

https://orionbrowser.com/
168•sebjones•12h ago•106 comments

Self-Powered Trailers Promise Leaner Freight Runs

https://spectrum.ieee.org/self-powered-trailers-freight-decarbonization
15•rbanffy•1w ago•9 comments

Power companies are using eminent domain to seize land for data centers

https://fortune.com/2026/07/19/data-center-eminent-domain-public-use/
79•1vuio0pswjnm7•2h ago•30 comments

What I learned selling 2,500 MIDI recorders: Hardware is not so hard

https://chipweinberger.com/articles/20260719-hardware-is-not-so-hard
468•chipweinberger•20h ago•214 comments

Sealed tomb filled with paintings and inscriptions discovered in Egypt

https://www.labrujulaverde.com/en/2026/07/sealed-tomb-of-a-high-official-or-priest-filled-with-pa...
9•isaacfrond•4d ago•1 comments

The Zen of Parallel Programming

https://smolnero.com/posts/the-zen-of-parallel-programming
151•edgar_ortega•5d ago•17 comments

Claude Fable produced a counterexample to the Jacobian Conjecture

https://xcancel.com/__alpoge__/status/2079028340955197566
293•loubbrad•4h ago•164 comments

Minecraft: Java Edition now uses SDL3

https://www.minecraft.net/en-us/article/minecraft-26-3-snapshot-4
297•ObviouslyFlamer•19h ago•201 comments

How proprietary formats have become Microsoft’s main tool for lock-in

https://blog.documentfoundation.org/blog/2026/07/17/microsofts-main-tool-for-lock-in/
36•cube00•2h ago•7 comments

Bananas sprout in Rayleigh Garden UK after 15 years

https://www.bbc.com/news/articles/cvg8edqq5g5o
152•teleforce•17h ago•110 comments

HomeLab #1: MikroTik as a Home Router

https://justsomebody.dev/blog/mikrotik-home-router
100•rafal_opilowski•12h ago•87 comments

11,700 Free Photos from John Margolies' Archive of Americana Architecture

https://www.openculture.com/2026/07/free-photos-from-john-margolies-archive-of-americana-architec...
51•gslin•4d ago•2 comments

Qwen 3.8

https://twitter.com/Alibaba_Qwen/status/2078759124914098291
855•nh43215rgb•22h ago•585 comments

Biggest Probabilistic Computer Turns Noise into Answers

https://spectrum.ieee.org/biggest-probabilistic-computer
64•rbanffy•9h ago•10 comments

Who Is America's Homer?

https://www.plough.com/articles/who-is-americas-homer
67•samclemens•5d ago•160 comments

A new Intel Itanium (IA-64) emulator that boots Windows

https://raymii.org/s/blog/Intel_Itanium_IA-64-Emulator_that_boots_Windows.html
73•jandeboevrie•10h ago•62 comments

I joined the IndieWeb, here's what I learned

https://en.andros.dev/blog/0b8e451e/i-joined-the-indieweb-heres-what-i-learned/
190•andros•20h ago•93 comments

Talk: The Art of Braiding Algorithms

https://pgadey.ca/notes/talk-relatorium-2026/
36•surprisetalk•4d ago•0 comments

I burned all my tokens researching how to save tokens

https://quesma.com/blog/custom-deep-research-pipeline/
126•bkotrys•19h ago•159 comments

C64 Basic Dungeon Crawler: Goblin Attack (C64 Basic Part 8)

https://retrogamecoders.com/c64-basic-dungeon-part8/
68•ibobev•15h ago•5 comments

HMD Touch 4G

https://www.hmd.com/en_int/hmd-touch-4g
69•thisislife2•13h ago•71 comments

Cagire: Live Coding in Forth

https://cagire.raphaelforment.fr
91•surprisetalk•1w ago•11 comments

Dupes took over the world

https://www.vox.com/podcasts/493930/dupe-culture-fender-ugg-quince-tiktok-amazon-online-shopping
83•gumby•5d ago•77 comments

Terence McKenna's Mega Bad Trip (2025)

https://psychedelics.community/cultural-icons/terence-mckennas-mega-bad-trip
87•Dimmiwoah•16h ago•78 comments
Open in hackernews

How ZGC allocates memory for the Java heap

https://joelsiks.com/posts/zgc-heap-memory-allocation/
86•lichtenberger•1y ago

Comments

gopalv•1y ago
The 32x virtual memory to physical memory ratio plays into relocation and colored pointers (i.e pointers where some bits serve as flag bits).

Putting the actual data layouts in 44 bits out of 64 is a neat trick which relies on the allocator being aware of the mappings between physical and virtual addresses.

twoodfin•1y ago
When your comment and the article refer to “physical” addresses, those are physical in the context of the JVM, right? To the OS they’re virtual addresses in the JVM process space?
acchow•1y ago
Correct. ZGC has no way to escape from the virtualization by the kernel (assuming your hardware and kernel uses an MMU)
MBCook•1y ago
Thank you for the answer, I was wondering that as well.
hinkley•1y ago
In the beginning of the 32 bit revolution, when the future was here but unevenly distributed, there was a lot of talk about how 32 bit pointers would fundamentally change how people wrote code. Among other things it got rid of a bunch of odd bookkeeping, and if you don’t have to do the bookkeeping you don’t have to write the code in a way that supports it, so you can do other things.

Not too long after someone asked what sort of interesting changes 64 bit will bring. And I’ve been keeping that question in the back of my mind ever since.

Aliasing memory multiple times in order to do read or write barriers and make GC much cheaper is a pretty good one. But another one I know of is that one of the secrets of the L4 microkernel is that its IPC speed comes substantially from reducing the amount of TLB work that needs to be done to switch to another process running in a different address space. They use the same address space and only swap out the access rights which cuts the call overhead in half. It’s pretty easy to put a bunch of processes into a 64 bit address space and just throw each one a randomly located 4GB slice of RAM.

twoodfin•1y ago
Yeah, would love to see the CPU vendors invent some primitives to let user code pull those kinds of privilege isolation tricks within a single process and address space.

Something like: “From now on, code on these pages can only access data on these pages, and only return to/call into other code through these gates…”

hinkley•1y ago
Thread based seems like it at least should be possible.
ahartmetz•1y ago
I've had some ideas about avoiding format validation in IPC receivers if the data is encoded by trusted code, which is also the only code that has rights to send the IPC data / to connect to the receiver. I can't really think of an important problem that it would solve, though. DBus always validates received data, but it's not really meant or very suitable for large amounts of data anyway.
pron•1y ago
For relevant upcoming changes see Automatic Heap Sizing for ZGC: https://openjdk.org/jeps/8329758
twoodfin•1y ago
What I’m looking for is a way for a process to de/re-escalate its privileges to access memory, without an expensive context switch being required at the transition. The CPU would simply enforce different rules based on (say) the high-order bits of the instruction pointer.

Imagine a server process that wants to run some elaborate third-party content parser. It’d be great to be sure that no matter how buggy or malicious that code, it can’t leak the TLS keys.

Today, high-security architectures must use process isolation to achieve this kind of architectural guarantee, but even finely tuned IPC like L4’s is an order of magnitude slower than a predictable jump.

gpderetta•1y ago
For a brief moment Intel supported MPX which did something similar.

You can also play tricks with the virtualization hardware, bit it need kernel support.

Eventually we will get segments back again.

MarkSweep•1y ago
That would be pretty cool. Something like the Win32 function GetWriteWatch, but implemented in hardware instead of the page fault handler (I assume).

https://learn.microsoft.com/en-us/windows/win32/api/memoryap...

Or some sort of special write barrier store op-code, idk.

mike_hearn•1y ago
It exists, that's called MPKs.
twoodfin•1y ago
I don’t think MPK’s will fit the need I have. Simply: Run some arbitrary, untrusted, non-sandboxed code in the same thread with assurance it can’t read page X. When that code completes and I’m back in code I trust, X is readable again.

Is that something MPK makes possible? The doc I’ve read suggests either your process can flip permission bits or it can’t. Great for avoiding out-of-sandbox reads. But if there’s arbitrary execution happening, why can’t that code flip the access to secrets back on?

mike_hearn•1y ago
Oracle Labs has tech that does that:

https://youtu.be/T05FI93MBI8?si=EieFgujaGiW2gbO8&t=958

The trick is to do a cascading disassembly of all untrusted code you'll execute to prove it can't change the MPK register.

twoodfin•1y ago
Wow. Neat trick and exactly the kind of thing I was looking for.

Thanks!

EDIT: Looks like this is the relevant paper from the Graal team: https://www.graalvm.org/resources/articles/binsweep.pdf

jdougan•1y ago
Is that something like the memory protection scheme on the Newton OS?
nyanpasu64•1y ago
Isn't not swapping page tables during a call precisely what the KPTI mitigations had to turn off for Meltdown mitigations?