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Einstein's relativity rules chemical bonds in heavy elements, new research shows

https://www.brown.edu/news/2026-07-09/chemical-bonds-relativity
124•hhs•4h ago•43 comments

QuadRF can spot drones and see WiFi through my wall

https://www.jeffgeerling.com/blog/2026/quadrf-can-spot-drones-and-see-wifi-through-my-wall/
475•speckx•11h ago•176 comments

Apple sues OpenAI, accuses ex-employees of stealing trade secrets

https://9to5mac.com/2026/07/10/apple-sues-openai-trade-secret-theft/
632•stock_toaster•6h ago•308 comments

The footgun of right-to-left decorative characters

https://blog.alexbeals.com/posts/the-footgun-of-right-to-left-decorative-characters
16•dado3212•4d ago•6 comments

An iroh powered smart fan

https://www.iroh.computer/blog/an-iroh-powered-smart-fan
39•surprisetalk•3d ago•4 comments

GPT-5.6 Sol Ultra produces proof of the Cycle Double Cover Conjecture [pdf]

https://cdn.openai.com/pdf/04d1d1e4-bc75-476a-97cf-49055cd98d31/cdc_proof.pdf
369•scrlk•8h ago•300 comments

An update on residential proxies and the scraper situation

https://lwn.net/SubscriberLink/1080822/990a8a5e2d379085/
103•chmaynard•7h ago•99 comments

SpaceX wants to launch 100k more Starlink satellites for 100x the bandwidth

https://www.zdnet.com/home-and-office/networking/spacex-wants-to-launch-100000-more-starlink-sate...
93•CrankyBear•9h ago•299 comments

Inference Optimization for MiMo v2.5: Pushing Hybrid SWA Efficiency to the Limit

https://mimo.xiaomi.com/blog/mimo-v2-5-inference
51•theanonymousone•3d ago•19 comments

The tech of 'Terminator 2' – an oral history (2017)

https://vfxblog.com/2017/08/23/the-tech-of-terminator-2-an-oral-history/
178•markus_zhang•10h ago•68 comments

Combustion engine web-based simulator

https://combustionlab.net
127•mytuny•5d ago•54 comments

New York City to to ban deceptive subscription practices

https://www.theguardian.com/us-news/2026/jul/10/new-york-city-deceptive-subscriptions-ban
434•randycupertino•8h ago•224 comments

Good Tools Are Invisible

https://www.gingerbill.org/article/2026/07/10/good-tools-are-invisible/
371•theanonymousone•16h ago•176 comments

Late Bronze Age Collapse

https://acoup.blog/2026/01/30/collections-the-late-bronze-age-collapse-a-very-brief-introduction/
332•dmonay•15h ago•232 comments

AI 2040: Plan A

https://ai-2040.com/
169•kschaul•1d ago•169 comments

Preemption is GC for memory reordering (2019)

https://pvk.ca/Blog/2019/01/09/preemption-is-gc-for-memory-reordering/
14•mpweiher•2d ago•2 comments

Computation as a universal and fundamental concept

https://ergo.org/courses/computation-as-a-universal-and-fundamental-concept
95•simonpure•11h ago•73 comments

Moss (YC F25) Is Hiring

https://www.ycombinator.com/companies/moss/jobs/52LnqLQ-software-engineer-sdk
1•srimalireddi•5h ago

Alternate clock designs and time systems

https://serialc.github.io/altClocks/
110•ethanpil•4d ago•59 comments

After 7 years in production, Scarf has reluctantly moved away from Haskell

https://avi.press/posts/2026-07-10-after-7-years-in-production-scarf-has-reluctantly-moved-away-f...
88•aviaviavi•13h ago•102 comments

FreeCAD in the Browser

https://magik.net/freecad/
31•cui•2h ago•20 comments

Show HN: Wyrm – Solve algebra by touch, built on an open-source soundness engine

https://github.com/dicroce/wyrm_math
63•dicroce•1d ago•9 comments

Snails' teeth beats spider silk as nature's strongest material (2015)

https://www.smithsonianmag.com/smart-news/spider-silk-loses-top-spot-natures-strongest-material-s...
161•simonebrunozzi•10h ago•127 comments

War Atlas: An interactive cartography of every named war in human history

https://waratlas.org
121•NaOH•9h ago•58 comments

A love letter to flashcards

https://lesleylai.info/en/flashcards/
133•surprisetalk•11h ago•82 comments

Lost city discovered beneath Egypt's desert with ancient church

https://www.dailymail.com/sciencetech/article-15956159/Incredible-lost-city-discovered-Egypts-des...
164•Bender•4d ago•75 comments

GhostLock, a stack-UAF that has existed in ALL Linux distributions for 15 years

https://nebusec.ai/research/ionstack-part-2/
43•djfergus•6h ago•9 comments

Successful Companies Go Blind

https://ianreppel.org/how-successful-companies-go-blind/
195•speckx•13h ago•69 comments

How the terrorist group Boko Haram uses frontier AI

https://casp.ac/reports/ai-enabled-terrorism
187•imustachyou•8h ago•158 comments

Ask HN: Are systems ready for the first negative leap second?

59•Asmod4n•4d ago•61 comments
Open in hackernews

How ZGC allocates memory for the Java heap

https://joelsiks.com/posts/zgc-heap-memory-allocation/
86•lichtenberger•1y ago

Comments

gopalv•1y ago
The 32x virtual memory to physical memory ratio plays into relocation and colored pointers (i.e pointers where some bits serve as flag bits).

Putting the actual data layouts in 44 bits out of 64 is a neat trick which relies on the allocator being aware of the mappings between physical and virtual addresses.

twoodfin•1y ago
When your comment and the article refer to “physical” addresses, those are physical in the context of the JVM, right? To the OS they’re virtual addresses in the JVM process space?
acchow•1y ago
Correct. ZGC has no way to escape from the virtualization by the kernel (assuming your hardware and kernel uses an MMU)
MBCook•1y ago
Thank you for the answer, I was wondering that as well.
hinkley•1y ago
In the beginning of the 32 bit revolution, when the future was here but unevenly distributed, there was a lot of talk about how 32 bit pointers would fundamentally change how people wrote code. Among other things it got rid of a bunch of odd bookkeeping, and if you don’t have to do the bookkeeping you don’t have to write the code in a way that supports it, so you can do other things.

Not too long after someone asked what sort of interesting changes 64 bit will bring. And I’ve been keeping that question in the back of my mind ever since.

Aliasing memory multiple times in order to do read or write barriers and make GC much cheaper is a pretty good one. But another one I know of is that one of the secrets of the L4 microkernel is that its IPC speed comes substantially from reducing the amount of TLB work that needs to be done to switch to another process running in a different address space. They use the same address space and only swap out the access rights which cuts the call overhead in half. It’s pretty easy to put a bunch of processes into a 64 bit address space and just throw each one a randomly located 4GB slice of RAM.

twoodfin•1y ago
Yeah, would love to see the CPU vendors invent some primitives to let user code pull those kinds of privilege isolation tricks within a single process and address space.

Something like: “From now on, code on these pages can only access data on these pages, and only return to/call into other code through these gates…”

hinkley•1y ago
Thread based seems like it at least should be possible.
ahartmetz•1y ago
I've had some ideas about avoiding format validation in IPC receivers if the data is encoded by trusted code, which is also the only code that has rights to send the IPC data / to connect to the receiver. I can't really think of an important problem that it would solve, though. DBus always validates received data, but it's not really meant or very suitable for large amounts of data anyway.
pron•1y ago
For relevant upcoming changes see Automatic Heap Sizing for ZGC: https://openjdk.org/jeps/8329758
twoodfin•1y ago
What I’m looking for is a way for a process to de/re-escalate its privileges to access memory, without an expensive context switch being required at the transition. The CPU would simply enforce different rules based on (say) the high-order bits of the instruction pointer.

Imagine a server process that wants to run some elaborate third-party content parser. It’d be great to be sure that no matter how buggy or malicious that code, it can’t leak the TLS keys.

Today, high-security architectures must use process isolation to achieve this kind of architectural guarantee, but even finely tuned IPC like L4’s is an order of magnitude slower than a predictable jump.

gpderetta•1y ago
For a brief moment Intel supported MPX which did something similar.

You can also play tricks with the virtualization hardware, bit it need kernel support.

Eventually we will get segments back again.

MarkSweep•1y ago
That would be pretty cool. Something like the Win32 function GetWriteWatch, but implemented in hardware instead of the page fault handler (I assume).

https://learn.microsoft.com/en-us/windows/win32/api/memoryap...

Or some sort of special write barrier store op-code, idk.

mike_hearn•1y ago
It exists, that's called MPKs.
twoodfin•1y ago
I don’t think MPK’s will fit the need I have. Simply: Run some arbitrary, untrusted, non-sandboxed code in the same thread with assurance it can’t read page X. When that code completes and I’m back in code I trust, X is readable again.

Is that something MPK makes possible? The doc I’ve read suggests either your process can flip permission bits or it can’t. Great for avoiding out-of-sandbox reads. But if there’s arbitrary execution happening, why can’t that code flip the access to secrets back on?

mike_hearn•1y ago
Oracle Labs has tech that does that:

https://youtu.be/T05FI93MBI8?si=EieFgujaGiW2gbO8&t=958

The trick is to do a cascading disassembly of all untrusted code you'll execute to prove it can't change the MPK register.

twoodfin•1y ago
Wow. Neat trick and exactly the kind of thing I was looking for.

Thanks!

EDIT: Looks like this is the relevant paper from the Graal team: https://www.graalvm.org/resources/articles/binsweep.pdf

jdougan•1y ago
Is that something like the memory protection scheme on the Newton OS?
nyanpasu64•1y ago
Isn't not swapping page tables during a call precisely what the KPTI mitigations had to turn off for Meltdown mitigations?