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Data centers raise nearby temperatures by up to 4 degrees in Phoenix

https://asmedigitalcollection.asme.org/sustainablebuildings/article/7/2/024501/1233035/Data-Cente...
109•cwwc•1h ago•89 comments

Claude Code weekly limits reduce by a third tomorrow

https://support.claude.com/en/articles/15910845-claude-code-may-august-2026-weekly-limits-promotion
203•tyre•1h ago•139 comments

Turbovec – Google's TurboQuant for vector search in Rust

https://github.com/RyanCodrai/turbovec
21•fittingopposite•33m ago•1 comments

Using the railway network as a flatbed scanner

https://philo.gay/linecam/
298•otherayden•5h ago•52 comments

Fixing a bricked Framework laptop

https://quantum5.ca/2026/08/16/fixing-bricked-amd-7040-series-framework-13-laptop-with-20-tools/
244•jp_sc•5h ago•154 comments

The Amazon tax

https://seths.blog/2026/08/the-amazon-tax/
545•herbertl•5h ago•379 comments

How does IKEA come up with names for its products?

https://www.ikea.com/se/en/customer-service/knowledge/articles/6f564c4d-2ccc-46de-b643-545a3948dc...
24•NaOH•29m ago•5 comments

Cursor launches Origin, GitHub alternative

https://cursor.com/changelog/origin-code-hosting
259•tomasreimers•1d ago•206 comments

Launch HN: machine0 (YC S26) – Persistent CPU and GPU VMs from the CLI

https://machine0.io
25•bwm•2h ago•19 comments

Linux 7.3 improves performance when running out of vRAM

https://pixelcluster.dev/VRAM-Overcommit/
438•flaburgan•10h ago•194 comments

We've flown a radiation-blocking vest to the Moon and back, and it worked

https://arstechnica.com/science/2026/08/weve-flown-a-radiation-blocking-vest-to-the-moon-and-back...
29•rbanffy•4d ago•7 comments

Python Polars Cheatsheet (based on our O'Reilly book)

https://opensource.posit.co/resources/cheatsheets/polars/
109•jeroenjanssens•5h ago•16 comments

Superpowers, Not Superintelligence

https://bond.now/news/superpowers-not-superintelligence
22•edbernays•2h ago•24 comments

Splitting a Git Commit

https://blog.gnoack.org/post/git-history-split
82•signa11•3d ago•37 comments

Teaching my kid to code with a modern MUD

https://tau.dev/2026/08/07/canon
177•andrewjanke•6d ago•50 comments

Evolve: An incremental game about evolving a civilization

https://pmotschmann.github.io/Evolve/
9•frozenseven•3d ago•4 comments

Memory prices climb 500% in 12 months

https://www.tomshardware.com/pc-components/ram/memory-prices-climb-500-percent-in-12-months-up-to...
218•haunter•1d ago•165 comments

Ask HN: I've quit six systems for tracking my illness. What works?

37•Abh1Works•2d ago•37 comments

Show HN: macOS data protection keychain for Electron apps

https://github.com/biw/keychain-store
6•biwills•1h ago•0 comments

Babies born under sugar rationing grew into adults with lower cancer risk

https://theconversation.com/babies-born-under-sugar-rationing-grew-into-adults-with-lower-cancer-...
168•zeristor•4h ago•37 comments

Fairphone is now officially available in the United States

https://www.fairphone.com/nl/stories/the-fairphone-gen-6-is-all-about-giving-you-more
285•Vinnl•5h ago•139 comments

Show HN: Openleetcode – local LeetCode runner where tests live in the repo

https://github.com/therepanic/openleetcode
21•therepanic•3h ago•9 comments

Universal health coverage could save $1T and 114k lives a year: study

https://ysph.yale.edu/news-article/universal-health-coverage-could-save-one-trillion-dollars-and-...
487•karakoram•1d ago•591 comments

California's new tire efficiency rules could save drivers $1B a year

https://grist.org/transportation/californias-new-tire-efficiency-rules-could-save-drivers-1b-a-year/
84•littlexsparkee•15h ago•110 comments

Code-native generation of highly programmable 3D assets (2026)

https://arxiv.org/abs/2607.22738
36•baigy•3h ago•34 comments

Google has acquired the data of failed US airline Spirit

https://www.theregister.com/ai-and-ml/2026/08/18/google-buys-crashed-airline-spirits-data-at-auct...
500•pseudolus•8h ago•350 comments

Rethinking Database Programming

https://acadia.engineering/blog/rethinking-database-programming
200•honungsburk•11h ago•103 comments

Ask HN: GitHub employees what's going on? Why?

144•sharts•1d ago•110 comments

Meta Files Patent for Facial Recognition, Automatic Recording of People

https://www.privacyguides.org/news/2026/08/17/meta-files-patent-for-facial-recognition-automatic-...
216•DeepLogin•6h ago•129 comments

Diesel Margins Top $100 a Barrel to Reach Record High as Supply Crunch Grows

https://www.bloomberg.com/news/articles/2026-08-18/diesel-margins-top-100-a-barrel-to-reach-recor...
36•toomuchtodo•2h ago•13 comments
Open in hackernews

How ZGC allocates memory for the Java heap

https://joelsiks.com/posts/zgc-heap-memory-allocation/
86•lichtenberger•1y ago

Comments

gopalv•1y ago
The 32x virtual memory to physical memory ratio plays into relocation and colored pointers (i.e pointers where some bits serve as flag bits).

Putting the actual data layouts in 44 bits out of 64 is a neat trick which relies on the allocator being aware of the mappings between physical and virtual addresses.

twoodfin•1y ago
When your comment and the article refer to “physical” addresses, those are physical in the context of the JVM, right? To the OS they’re virtual addresses in the JVM process space?
acchow•1y ago
Correct. ZGC has no way to escape from the virtualization by the kernel (assuming your hardware and kernel uses an MMU)
MBCook•1y ago
Thank you for the answer, I was wondering that as well.
hinkley•1y ago
In the beginning of the 32 bit revolution, when the future was here but unevenly distributed, there was a lot of talk about how 32 bit pointers would fundamentally change how people wrote code. Among other things it got rid of a bunch of odd bookkeeping, and if you don’t have to do the bookkeeping you don’t have to write the code in a way that supports it, so you can do other things.

Not too long after someone asked what sort of interesting changes 64 bit will bring. And I’ve been keeping that question in the back of my mind ever since.

Aliasing memory multiple times in order to do read or write barriers and make GC much cheaper is a pretty good one. But another one I know of is that one of the secrets of the L4 microkernel is that its IPC speed comes substantially from reducing the amount of TLB work that needs to be done to switch to another process running in a different address space. They use the same address space and only swap out the access rights which cuts the call overhead in half. It’s pretty easy to put a bunch of processes into a 64 bit address space and just throw each one a randomly located 4GB slice of RAM.

twoodfin•1y ago
Yeah, would love to see the CPU vendors invent some primitives to let user code pull those kinds of privilege isolation tricks within a single process and address space.

Something like: “From now on, code on these pages can only access data on these pages, and only return to/call into other code through these gates…”

hinkley•1y ago
Thread based seems like it at least should be possible.
ahartmetz•1y ago
I've had some ideas about avoiding format validation in IPC receivers if the data is encoded by trusted code, which is also the only code that has rights to send the IPC data / to connect to the receiver. I can't really think of an important problem that it would solve, though. DBus always validates received data, but it's not really meant or very suitable for large amounts of data anyway.
pron•1y ago
For relevant upcoming changes see Automatic Heap Sizing for ZGC: https://openjdk.org/jeps/8329758
twoodfin•1y ago
What I’m looking for is a way for a process to de/re-escalate its privileges to access memory, without an expensive context switch being required at the transition. The CPU would simply enforce different rules based on (say) the high-order bits of the instruction pointer.

Imagine a server process that wants to run some elaborate third-party content parser. It’d be great to be sure that no matter how buggy or malicious that code, it can’t leak the TLS keys.

Today, high-security architectures must use process isolation to achieve this kind of architectural guarantee, but even finely tuned IPC like L4’s is an order of magnitude slower than a predictable jump.

gpderetta•1y ago
For a brief moment Intel supported MPX which did something similar.

You can also play tricks with the virtualization hardware, bit it need kernel support.

Eventually we will get segments back again.

MarkSweep•1y ago
That would be pretty cool. Something like the Win32 function GetWriteWatch, but implemented in hardware instead of the page fault handler (I assume).

https://learn.microsoft.com/en-us/windows/win32/api/memoryap...

Or some sort of special write barrier store op-code, idk.

mike_hearn•1y ago
It exists, that's called MPKs.
twoodfin•1y ago
I don’t think MPK’s will fit the need I have. Simply: Run some arbitrary, untrusted, non-sandboxed code in the same thread with assurance it can’t read page X. When that code completes and I’m back in code I trust, X is readable again.

Is that something MPK makes possible? The doc I’ve read suggests either your process can flip permission bits or it can’t. Great for avoiding out-of-sandbox reads. But if there’s arbitrary execution happening, why can’t that code flip the access to secrets back on?

mike_hearn•1y ago
Oracle Labs has tech that does that:

https://youtu.be/T05FI93MBI8?si=EieFgujaGiW2gbO8&t=958

The trick is to do a cascading disassembly of all untrusted code you'll execute to prove it can't change the MPK register.

twoodfin•1y ago
Wow. Neat trick and exactly the kind of thing I was looking for.

Thanks!

EDIT: Looks like this is the relevant paper from the Graal team: https://www.graalvm.org/resources/articles/binsweep.pdf

jdougan•1y ago
Is that something like the memory protection scheme on the Newton OS?
nyanpasu64•1y ago
Isn't not swapping page tables during a call precisely what the KPTI mitigations had to turn off for Meltdown mitigations?