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How I Find Problems to Solve as a Staff Engineer

https://lalitm.com/post/find-problems-staff-engineer/
78•vanpra•1h ago•28 comments

A website for debloated open source alternatives

https://debloat.dev/
165•ryanvogel•3h ago•66 comments

Fable and the End of the Free Lunch

https://www.dbreunig.com/2026/08/23/fable-the-end-of-moore-s-law.html
52•dbreunig•1h ago•33 comments

The Vibe Tax

https://insufferable.dev/posts/vibe-tax/
33•allisdust•2h ago•14 comments

How Complex Systems Fail (1998)

https://how.complexsystems.fail/
169•shortcrct•5h ago•48 comments

Why Sal Khan't: On Learning by Making but Teaching by Telling

https://punyamishra.com/2026/04/16/why-sal-khant-on-learning-by-making-but-teaching-by-telling/
84•the-mitr•4h ago•58 comments

Malware infects Android-based automotive head unit firmware

https://securelist.com/android-head-unit-malware/121106/
183•campuscodi•7h ago•85 comments

What Is a Harness?

https://earendil.com/posts/what-is-a-harness/
200•tosh•6h ago•106 comments

My favorite nonfiction books about cults, scams, and schemes

https://bookdna.com/best-books/nonfiction-about-cults-scams-and-schemes
160•bwb•6h ago•59 comments

Coconut Oil Jet Fuel Matches Kerosene's Efficiency in Engine Tests

https://studyfinds.com/coconut-oil-jet-fuel-matches-kerosenes-efficiency-in-engine-tests/
108•mdp2021•5h ago•93 comments

My agent.md to improve LLM-assisted code quality

https://fabiensanglard.net/agent.md/index.html
29•ibobev•2h ago•15 comments

Explain it to me like I'm ten

https://timharford.com/2026/08/explain-it-to-me-like-im-ten/
30•bookofjoe•2h ago•16 comments

I spent $266 and four AI models to own my tablet. GLM-5.3 finished it in a day

https://ericpardee.github.io/fire-hd-ownership/
539•dr_pardee•6h ago•234 comments

Decoding silent reading from non-invasive EEG

https://arxiv.org/abs/2608.20186
4•root-parent•36m ago•0 comments

Slovakia finds Russian backdoor in traffic speed cameras

https://risky.biz/risky-bulletin-slovakia-finds-russian-backdoor-in-traffic-speed-cameras/
295•dredmorbius•6h ago•118 comments

Over 170k Nonprofits Lost All Their Data. Is Microsoft to Blame?

https://slate.com/technology/2026/08/microsoft-software-nonprofit-data-delete.html
60•tchalla•1h ago•21 comments

Phoenix tried a reflective coating on black asphalt; noon surface heat fell 12°F

https://economictimes.indiatimes.com/news/international/us/phoenix-swapped-black-asphalt-for-a-re...
19•djoldman•4h ago•19 comments

Wi-Fi 8 is the first wireless upgrade in years that isn't chasing speed

https://www.xda-developers.com/wi-fi-8-first-wireless-upgrade-years-isnt-chasing-speed-home-netwo...
254•taubek•14h ago•195 comments

Etched Sohu vs. Nvidia: Transformer ASIC vs. GPU (2026) – Spheron Blog

https://www.spheron.network/blog/etched-ai-sohu-vs-nvidia-transformer-asic-inference/
7•rbanffy•2h ago•0 comments

The End of an Athlon

http://www.os2museum.com/wp/the-end-of-an-athlon/
171•userbinator•14h ago•77 comments

Predicting AI model release dates with stats

https://releaseoracle.xyz/
8•akeyes6•2h ago•0 comments

I turned Unix talk from 1983 into the interface for my AI

https://en.andros.dev/blog/09a21bdd/i-turned-unix-talk-from-1983-into-the-interface-for-my-ai/
8•ibobev•2h ago•2 comments

The Remote Work Challenge: Lessons from 5 Cities

https://www.pew.org/en/research-and-analysis/reports/2026/05/the-remote-work-challenge-lessons-fr...
8•softwaredoug•3h ago•2 comments

Erik Brynjolfsson says an AI "job apocalypse" is unlikely

https://wpintelligence.washingtonpost.com/topics/ai-tech/2026/08/19/wpi-conversation-why-an-ai-jo...
11•gumby•3h ago•5 comments

AI and Infrastructure Engineering

https://omegion.dev/2026/08/ai-and-infrastructure-engineering/
11•0megion•2h ago•1 comments

Things I want in a modern relational query language

https://sporks.space/2026/08/19/things-i-want-in-a-modern-relational-query-language/
72•zdw•1d ago•61 comments

From Front Panel to Program: Thinking Like a PDP-8

https://pikuma.com/blog/pdp-8-minicomputer
7•ibobev•2h ago•0 comments

Anthropic's best AI model struggles to attract users as cheaper tools thrive

https://www.ft.com/content/5ee49718-c258-4f01-aa32-7e5b76ae5245
45•naves•2h ago•40 comments

I gave Qwen 3.8 27B a reverse-engineering job and it finished in 30 minutes

https://www.xda-developers.com/qwen-3-8-27b-reverse-engineering-job-frontier-model/
286•raybb•10h ago•121 comments

MartyPC is a cross-platform emulator of early PCs written in Rust

https://martypc.net/
195•boilerupnc•17h ago•73 comments
Open in hackernews

How ZGC allocates memory for the Java heap

https://joelsiks.com/posts/zgc-heap-memory-allocation/
86•lichtenberger•1y ago

Comments

gopalv•1y ago
The 32x virtual memory to physical memory ratio plays into relocation and colored pointers (i.e pointers where some bits serve as flag bits).

Putting the actual data layouts in 44 bits out of 64 is a neat trick which relies on the allocator being aware of the mappings between physical and virtual addresses.

twoodfin•1y ago
When your comment and the article refer to “physical” addresses, those are physical in the context of the JVM, right? To the OS they’re virtual addresses in the JVM process space?
acchow•1y ago
Correct. ZGC has no way to escape from the virtualization by the kernel (assuming your hardware and kernel uses an MMU)
MBCook•1y ago
Thank you for the answer, I was wondering that as well.
hinkley•1y ago
In the beginning of the 32 bit revolution, when the future was here but unevenly distributed, there was a lot of talk about how 32 bit pointers would fundamentally change how people wrote code. Among other things it got rid of a bunch of odd bookkeeping, and if you don’t have to do the bookkeeping you don’t have to write the code in a way that supports it, so you can do other things.

Not too long after someone asked what sort of interesting changes 64 bit will bring. And I’ve been keeping that question in the back of my mind ever since.

Aliasing memory multiple times in order to do read or write barriers and make GC much cheaper is a pretty good one. But another one I know of is that one of the secrets of the L4 microkernel is that its IPC speed comes substantially from reducing the amount of TLB work that needs to be done to switch to another process running in a different address space. They use the same address space and only swap out the access rights which cuts the call overhead in half. It’s pretty easy to put a bunch of processes into a 64 bit address space and just throw each one a randomly located 4GB slice of RAM.

twoodfin•1y ago
Yeah, would love to see the CPU vendors invent some primitives to let user code pull those kinds of privilege isolation tricks within a single process and address space.

Something like: “From now on, code on these pages can only access data on these pages, and only return to/call into other code through these gates…”

hinkley•1y ago
Thread based seems like it at least should be possible.
ahartmetz•1y ago
I've had some ideas about avoiding format validation in IPC receivers if the data is encoded by trusted code, which is also the only code that has rights to send the IPC data / to connect to the receiver. I can't really think of an important problem that it would solve, though. DBus always validates received data, but it's not really meant or very suitable for large amounts of data anyway.
pron•1y ago
For relevant upcoming changes see Automatic Heap Sizing for ZGC: https://openjdk.org/jeps/8329758
twoodfin•1y ago
What I’m looking for is a way for a process to de/re-escalate its privileges to access memory, without an expensive context switch being required at the transition. The CPU would simply enforce different rules based on (say) the high-order bits of the instruction pointer.

Imagine a server process that wants to run some elaborate third-party content parser. It’d be great to be sure that no matter how buggy or malicious that code, it can’t leak the TLS keys.

Today, high-security architectures must use process isolation to achieve this kind of architectural guarantee, but even finely tuned IPC like L4’s is an order of magnitude slower than a predictable jump.

gpderetta•1y ago
For a brief moment Intel supported MPX which did something similar.

You can also play tricks with the virtualization hardware, bit it need kernel support.

Eventually we will get segments back again.

MarkSweep•1y ago
That would be pretty cool. Something like the Win32 function GetWriteWatch, but implemented in hardware instead of the page fault handler (I assume).

https://learn.microsoft.com/en-us/windows/win32/api/memoryap...

Or some sort of special write barrier store op-code, idk.

mike_hearn•1y ago
It exists, that's called MPKs.
twoodfin•1y ago
I don’t think MPK’s will fit the need I have. Simply: Run some arbitrary, untrusted, non-sandboxed code in the same thread with assurance it can’t read page X. When that code completes and I’m back in code I trust, X is readable again.

Is that something MPK makes possible? The doc I’ve read suggests either your process can flip permission bits or it can’t. Great for avoiding out-of-sandbox reads. But if there’s arbitrary execution happening, why can’t that code flip the access to secrets back on?

mike_hearn•1y ago
Oracle Labs has tech that does that:

https://youtu.be/T05FI93MBI8?si=EieFgujaGiW2gbO8&t=958

The trick is to do a cascading disassembly of all untrusted code you'll execute to prove it can't change the MPK register.

twoodfin•1y ago
Wow. Neat trick and exactly the kind of thing I was looking for.

Thanks!

EDIT: Looks like this is the relevant paper from the Graal team: https://www.graalvm.org/resources/articles/binsweep.pdf

jdougan•1y ago
Is that something like the memory protection scheme on the Newton OS?
nyanpasu64•1y ago
Isn't not swapping page tables during a call precisely what the KPTI mitigations had to turn off for Meltdown mitigations?