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Jev in 25 Lines of Python

https://www.nobodywho.ai/posts/jev-in-25-lines/
136•bashbjorn•2h ago•48 comments

GPT-6 Sol and Luna

https://openai.com/index/introducing-gpt-6-sol-and-luna/
1532•OfficialTurkey•15h ago•734 comments

Claude Opus 5.5

https://www.anthropic.com/claude-opus-5-5
1544•km144•17h ago•957 comments

Transit rewards

https://waymo.com/blog/2026/09/transit-rewards/
140•raybb•7h ago•141 comments

Netherlands bracing for potentially devastating US sanctions against the ICC

https://apnews.com/article/icc-trump-sanctions-eu-israel-netherlands-2c1cc314732f920c2de59396d3b5...
55•vrganj•48m ago•7 comments

Abandoning Scientific Linux Was a Mistake

https://blog.melashri.net/posts/scientific-linux-mistake/
45•elashri•1h ago•16 comments

OpenAI GPT–6 Astra breaks Enigma message that has resisted solution since 2005

https://www.cryptocellar.org/bgac/the-mvueh-break.html
660•sohkamyung•20h ago•387 comments

Microsoft killed FoxPro in 2007. Anyway, here's FoxPro revived

https://foxscript.org/
325•boredjohnny•12h ago•189 comments

Data-only attacks are easier than you think (2024)

https://www.usenix.org/publications/loginonline/data-only-attacks-are-easier-you-think
53•segfaultbuserr•6h ago•17 comments

'We hacked the FBI:' Hackers say they have data on all FBI employees

https://www.404media.co/we-hacked-the-fbi-hackers-say-they-have-data-on-all-fbi-employees/
609•spenvo•16h ago•445 comments

ReBarUEFI: Resizable BAR for almost any UEFI system

https://github.com/xCuri0/ReBarUEFI
154•nateb2022•2d ago•49 comments

Show HN: Npunlock – Run custom C kernels for Intel NPUs

https://github.com/hsfzxjy/npunlock
23•hsfzxjy•20h ago•4 comments

How did AMD Ryzen get 50% faster in two years?

https://lemire.me/blog/2026/09/18/how-did-amd-ryzen-get-50-faster-in-two-years/
332•ibobev•4d ago•129 comments

What California is learning from solar panels built over irrigation canals

https://www.kqed.org/science/2002033/heres-what-california-is-learning-from-solar-panels-built-ov...
216•Jtsummers•1d ago•386 comments

SAML: A fractal of bad design

https://blog.trailofbits.com/2026/09/21/saml-a-fractal-of-bad-design/
240•aray07•15h ago•141 comments

WordPress: Unauthenticated path traversal leading to conditional RCE

https://github.com/WordPress/wordpress-develop/security/advisories/GHSA-7hp8-65ch-5whp
192•vntok•17h ago•98 comments

Claude Opus 5.5 Intelligence, Performance and Price Analysis (Max)

https://artificialanalysis.ai/models/claude-opus-5-5
290•theanonymousone•17h ago•91 comments

Pentagon says overreliance on AI contributed to missile strike on Iran school

https://www.bloomberg.com/graphics/2026-iran-school-attack/
653•devonnull•14h ago•335 comments

No Easy Fix for Bogus Respondents in Online Opt-In Polls

https://www.pewresearch.org/methods/2026/08/27/no-easy-fix-for-bogus-respondents-in-online-opt-in...
32•luu•1d ago•13 comments

Unreal Agent

https://unreallabs.ai/blog/unreal-agent/
185•trollied•15h ago•107 comments

How often do you think about the 1893 World's Fair?

https://www.thebirthofacapital.info/chicago-worlds-fair-tataria-ware-larsen/
13•bryanrasmussen•4h ago•4 comments

People hooked on vapes try a new way to quit: cigarettes

https://www.bloomberg.com/news/articles/2026-09-18/to-quit-vaping-some-are-starting-to-smoke
186•alephnerd•1d ago•202 comments

The softness of metal

https://psyche.co/turning-points/his-frailty-made-ozzys-final-gig-true-heavy-metal
35•NaOH•1d ago•12 comments

The current balance of power in open models

https://www.interconnects.ai/p/the-current-balance-of-power-in-open
88•gmays•11h ago•29 comments

Grammarly will send unhinged messages to all your users if you try to cancel

https://www.reddit.com/r/sysadmin/comments/1wjdpgx/psa_grammarly_will_send_unhinged_messages_to_all/
153•ksec•5h ago•39 comments

Obscura: VPN that can't log your activity

https://obscura.com/#faq-technical
139•Flimm•14h ago•110 comments

OpenAI is well positioned to fast-follow Jev

https://arcturus-labs.com/blog/2026/09/21/will-openai-eat-jevs-lunch/
293•JohnBerryman•19h ago•208 comments

Show HN: JevBench, a reproducible benchmark for typed decision models

https://benchmarkheaven.com/jev-models
108•florianstandhar•20h ago•27 comments

Side-stepping the Secretary Problem, unwittingly

https://www.evalapply.org/posts/side-step-secretary-problem-hiring/index.html
82•pvdebbe•1d ago•13 comments

Markdown in /src

https://htmx.org/essays/markdown-in-src/
138•perrygeo•1d ago•72 comments
Open in hackernews

How ZGC allocates memory for the Java heap

https://joelsiks.com/posts/zgc-heap-memory-allocation/
86•lichtenberger•1y ago

Comments

gopalv•1y ago
The 32x virtual memory to physical memory ratio plays into relocation and colored pointers (i.e pointers where some bits serve as flag bits).

Putting the actual data layouts in 44 bits out of 64 is a neat trick which relies on the allocator being aware of the mappings between physical and virtual addresses.

twoodfin•1y ago
When your comment and the article refer to “physical” addresses, those are physical in the context of the JVM, right? To the OS they’re virtual addresses in the JVM process space?
acchow•1y ago
Correct. ZGC has no way to escape from the virtualization by the kernel (assuming your hardware and kernel uses an MMU)
MBCook•1y ago
Thank you for the answer, I was wondering that as well.
hinkley•1y ago
In the beginning of the 32 bit revolution, when the future was here but unevenly distributed, there was a lot of talk about how 32 bit pointers would fundamentally change how people wrote code. Among other things it got rid of a bunch of odd bookkeeping, and if you don’t have to do the bookkeeping you don’t have to write the code in a way that supports it, so you can do other things.

Not too long after someone asked what sort of interesting changes 64 bit will bring. And I’ve been keeping that question in the back of my mind ever since.

Aliasing memory multiple times in order to do read or write barriers and make GC much cheaper is a pretty good one. But another one I know of is that one of the secrets of the L4 microkernel is that its IPC speed comes substantially from reducing the amount of TLB work that needs to be done to switch to another process running in a different address space. They use the same address space and only swap out the access rights which cuts the call overhead in half. It’s pretty easy to put a bunch of processes into a 64 bit address space and just throw each one a randomly located 4GB slice of RAM.

twoodfin•1y ago
Yeah, would love to see the CPU vendors invent some primitives to let user code pull those kinds of privilege isolation tricks within a single process and address space.

Something like: “From now on, code on these pages can only access data on these pages, and only return to/call into other code through these gates…”

hinkley•1y ago
Thread based seems like it at least should be possible.
ahartmetz•1y ago
I've had some ideas about avoiding format validation in IPC receivers if the data is encoded by trusted code, which is also the only code that has rights to send the IPC data / to connect to the receiver. I can't really think of an important problem that it would solve, though. DBus always validates received data, but it's not really meant or very suitable for large amounts of data anyway.
pron•1y ago
For relevant upcoming changes see Automatic Heap Sizing for ZGC: https://openjdk.org/jeps/8329758
twoodfin•1y ago
What I’m looking for is a way for a process to de/re-escalate its privileges to access memory, without an expensive context switch being required at the transition. The CPU would simply enforce different rules based on (say) the high-order bits of the instruction pointer.

Imagine a server process that wants to run some elaborate third-party content parser. It’d be great to be sure that no matter how buggy or malicious that code, it can’t leak the TLS keys.

Today, high-security architectures must use process isolation to achieve this kind of architectural guarantee, but even finely tuned IPC like L4’s is an order of magnitude slower than a predictable jump.

gpderetta•1y ago
For a brief moment Intel supported MPX which did something similar.

You can also play tricks with the virtualization hardware, bit it need kernel support.

Eventually we will get segments back again.

MarkSweep•1y ago
That would be pretty cool. Something like the Win32 function GetWriteWatch, but implemented in hardware instead of the page fault handler (I assume).

https://learn.microsoft.com/en-us/windows/win32/api/memoryap...

Or some sort of special write barrier store op-code, idk.

mike_hearn•1y ago
It exists, that's called MPKs.
twoodfin•1y ago
I don’t think MPK’s will fit the need I have. Simply: Run some arbitrary, untrusted, non-sandboxed code in the same thread with assurance it can’t read page X. When that code completes and I’m back in code I trust, X is readable again.

Is that something MPK makes possible? The doc I’ve read suggests either your process can flip permission bits or it can’t. Great for avoiding out-of-sandbox reads. But if there’s arbitrary execution happening, why can’t that code flip the access to secrets back on?

mike_hearn•1y ago
Oracle Labs has tech that does that:

https://youtu.be/T05FI93MBI8?si=EieFgujaGiW2gbO8&t=958

The trick is to do a cascading disassembly of all untrusted code you'll execute to prove it can't change the MPK register.

twoodfin•1y ago
Wow. Neat trick and exactly the kind of thing I was looking for.

Thanks!

EDIT: Looks like this is the relevant paper from the Graal team: https://www.graalvm.org/resources/articles/binsweep.pdf

jdougan•1y ago
Is that something like the memory protection scheme on the Newton OS?
nyanpasu64•1y ago
Isn't not swapping page tables during a call precisely what the KPTI mitigations had to turn off for Meltdown mitigations?