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Sabotaging projects by overthinking, scope creep, and structural diffing

https://kevinlynagh.com/newsletter/2026_04_overthinking/
257•alcazar•4h ago•65 comments

SDL Now Supports DOS

https://github.com/libsdl-org/SDL/pull/15377
127•Jayschwa•2h ago•51 comments

OpenAI releases GPT-5.5 and GPT-5.5 Pro in the API

https://developers.openai.com/api/docs/changelog
34•arabicalories•52m ago•11 comments

SFO Quiet Airport (2025)

https://viewfromthewing.com/san-francisco-airport-removed-90-minutes-of-daily-noise-travelers-say...
28•CaliforniaKarl•46m ago•12 comments

I Cancelled Claude: Token Issues, Declining Quality, and Poor Support

https://nickyreinert.de/en/2026/2026-04-24-claude-critics/
485•y42•3h ago•285 comments

DeepSeek v4

https://api-docs.deepseek.com/
1664•impact_sy•16h ago•1297 comments

CSS as a Query Language

https://evdc.me/blog/css-query
21•evnc•1h ago•5 comments

Different Language Models Learn Similar Number Representations

https://arxiv.org/abs/2604.20817
69•Anon84•4h ago•27 comments

How to be anti-social – a guide to incoherent and isolating social experiences

https://nate.leaflet.pub/3mk4xkaxobc2p
215•calcifer•8h ago•218 comments

I'm done making desktop applications (2009)

https://www.kalzumeus.com/2009/09/05/desktop-aps-versus-web-apps/
99•claxo•3h ago•98 comments

Spinel: Ruby AOT Native Compiler

https://github.com/matz/spinel
263•dluan•10h ago•77 comments

Show HN: Browser Harness – Gives LLM freedom to complete any browser task

https://github.com/browser-use/browser-harness
42•gregpr07•4h ago•20 comments

Diatec, known for its mechanical keyboard brand FILCO, has ceased operations

https://gigazine.net/gsc_news/en/20260424-filco-diatec/
21•gslin•2h ago•4 comments

Physicists revive 1990s laser concept to propose a next-generation atomic clock

https://phys.org/news/2026-04-physicists-revive-1990s-laser-concept.html
34•wglb•18h ago•5 comments

CC-Canary: Detect early signs of regressions in Claude Code

https://github.com/delta-hq/cc-canary
7•tejpalv•1h ago•0 comments

US special forces soldier arrested after allegedly winning $400k on Maduro raid

https://www.cnn.com/2026/04/23/politics/us-special-forces-soldier-arrested-maduro-raid-trade
602•nkrisc•21h ago•640 comments

The operating cost of adult and gambling startups

https://orchidfiles.com/stigma-is-a-tax-on-every-operational-decision/
80•theorchid•6h ago•119 comments

Redesigning the Recurse Center application to inspire curious programmers

https://www.recurse.com/blog/192-redesigning-the-recurse-center-application
28•nicholasjbs•2h ago•4 comments

Mounting tar archives as a filesystem in WebAssembly

https://jeroen.github.io/notes/webassembly-tar/
98•datajeroen•9h ago•32 comments

Machine Learning Reveals Unknown Transient Phenomena in Historic Images

https://arxiv.org/abs/2604.18799
40•solarist•5h ago•28 comments

Norway Set to Become Latest Country to Ban Social Media for Under 16s

https://www.bloomberg.com/news/articles/2026-04-24/norway-wants-kids-to-be-kids-with-social-media...
304•1vuio0pswjnm7•4h ago•299 comments

Hear your agent suffer through your code

https://github.com/AndrewVos/endless-toil
153•AndrewVos•8h ago•75 comments

An update on recent Claude Code quality reports

https://www.anthropic.com/engineering/april-23-postmortem
891•mfiguiere•1d ago•669 comments

Tariffs Raised Consumers' Prices, but the Refunds Go Only to Businesses

https://www.nytimes.com/2026/04/24/us/politics/companies-consumers-tariff-refunds.html
39•duxup•2h ago•14 comments

Bitwarden CLI compromised in ongoing Checkmarx supply chain campaign

https://socket.dev/blog/bitwarden-cli-compromised
840•tosh•1d ago•409 comments

Tesla (TSLA) discloses $2B AI hardware company acquisition buried

https://electrek.co/2026/04/23/tesla-tsla-quietly-discloses-2-billion-ai-hardware-acquisition-10q/
51•Bender•2h ago•32 comments

GPT-5.5

https://openai.com/index/introducing-gpt-5-5/
1504•rd•1d ago•1004 comments

Why I Write (1946)

https://www.orwellfoundation.com/the-orwell-foundation/orwell/essays-and-other-works/why-i-write/
250•RyanShook•16h ago•67 comments

Refuse to let your doctor record you

https://buttondown.com/maiht3k/archive/why-you-should-refuse-to-let-your-doctor-record/
104•speckx•3h ago•113 comments

8087 Emulation on 8086 Systems

https://www.os2museum.com/wp/learn-something-old-every-day-part-xx-8087-emulation-on-8086-systems/
56•ingve•7h ago•20 comments
Open in hackernews

How ZGC allocates memory for the Java heap

https://joelsiks.com/posts/zgc-heap-memory-allocation/
86•lichtenberger•1y ago

Comments

gopalv•1y ago
The 32x virtual memory to physical memory ratio plays into relocation and colored pointers (i.e pointers where some bits serve as flag bits).

Putting the actual data layouts in 44 bits out of 64 is a neat trick which relies on the allocator being aware of the mappings between physical and virtual addresses.

twoodfin•1y ago
When your comment and the article refer to “physical” addresses, those are physical in the context of the JVM, right? To the OS they’re virtual addresses in the JVM process space?
acchow•1y ago
Correct. ZGC has no way to escape from the virtualization by the kernel (assuming your hardware and kernel uses an MMU)
MBCook•1y ago
Thank you for the answer, I was wondering that as well.
hinkley•1y ago
In the beginning of the 32 bit revolution, when the future was here but unevenly distributed, there was a lot of talk about how 32 bit pointers would fundamentally change how people wrote code. Among other things it got rid of a bunch of odd bookkeeping, and if you don’t have to do the bookkeeping you don’t have to write the code in a way that supports it, so you can do other things.

Not too long after someone asked what sort of interesting changes 64 bit will bring. And I’ve been keeping that question in the back of my mind ever since.

Aliasing memory multiple times in order to do read or write barriers and make GC much cheaper is a pretty good one. But another one I know of is that one of the secrets of the L4 microkernel is that its IPC speed comes substantially from reducing the amount of TLB work that needs to be done to switch to another process running in a different address space. They use the same address space and only swap out the access rights which cuts the call overhead in half. It’s pretty easy to put a bunch of processes into a 64 bit address space and just throw each one a randomly located 4GB slice of RAM.

twoodfin•1y ago
Yeah, would love to see the CPU vendors invent some primitives to let user code pull those kinds of privilege isolation tricks within a single process and address space.

Something like: “From now on, code on these pages can only access data on these pages, and only return to/call into other code through these gates…”

hinkley•1y ago
Thread based seems like it at least should be possible.
ahartmetz•1y ago
I've had some ideas about avoiding format validation in IPC receivers if the data is encoded by trusted code, which is also the only code that has rights to send the IPC data / to connect to the receiver. I can't really think of an important problem that it would solve, though. DBus always validates received data, but it's not really meant or very suitable for large amounts of data anyway.
twoodfin•1y ago
What I’m looking for is a way for a process to de/re-escalate its privileges to access memory, without an expensive context switch being required at the transition. The CPU would simply enforce different rules based on (say) the high-order bits of the instruction pointer.

Imagine a server process that wants to run some elaborate third-party content parser. It’d be great to be sure that no matter how buggy or malicious that code, it can’t leak the TLS keys.

Today, high-security architectures must use process isolation to achieve this kind of architectural guarantee, but even finely tuned IPC like L4’s is an order of magnitude slower than a predictable jump.

gpderetta•1y ago
For a brief moment Intel supported MPX which did something similar.

You can also play tricks with the virtualization hardware, bit it need kernel support.

Eventually we will get segments back again.

MarkSweep•1y ago
That would be pretty cool. Something like the Win32 function GetWriteWatch, but implemented in hardware instead of the page fault handler (I assume).

https://learn.microsoft.com/en-us/windows/win32/api/memoryap...

Or some sort of special write barrier store op-code, idk.

mike_hearn•12mo ago
It exists, that's called MPKs.
twoodfin•12mo ago
I don’t think MPK’s will fit the need I have. Simply: Run some arbitrary, untrusted, non-sandboxed code in the same thread with assurance it can’t read page X. When that code completes and I’m back in code I trust, X is readable again.

Is that something MPK makes possible? The doc I’ve read suggests either your process can flip permission bits or it can’t. Great for avoiding out-of-sandbox reads. But if there’s arbitrary execution happening, why can’t that code flip the access to secrets back on?

mike_hearn•12mo ago
Oracle Labs has tech that does that:

https://youtu.be/T05FI93MBI8?si=EieFgujaGiW2gbO8&t=958

The trick is to do a cascading disassembly of all untrusted code you'll execute to prove it can't change the MPK register.

twoodfin•12mo ago
Wow. Neat trick and exactly the kind of thing I was looking for.

Thanks!

EDIT: Looks like this is the relevant paper from the Graal team: https://www.graalvm.org/resources/articles/binsweep.pdf

jdougan•1y ago
Is that something like the memory protection scheme on the Newton OS?
nyanpasu64•1y ago
Isn't not swapping page tables during a call precisely what the KPTI mitigations had to turn off for Meltdown mitigations?
pron•1y ago
For relevant upcoming changes see Automatic Heap Sizing for ZGC: https://openjdk.org/jeps/8329758