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Type Server Protocol

https://github.com/microsoft/pylance-release/blob/main/docs/tsp/type-server-protocol.md
149•adamnemecek•3h ago•107 comments

Sebastian Raschka's from-scratch video course on building reasoning models

https://magazine.sebastianraschka.com/p/building-reasoning-models
481•sgiannopoulos•6h ago•70 comments

CSS-Tricks has a new owner

https://css-tricks.com/css-tricks-has-a-new-owner/
318•edent•5h ago•70 comments

Oldest GUI application that still runs on Windows 11

https://blog.enlyth.com/posts/oldest-windows-gui-app-win-11/
178•enlyth•3h ago•98 comments

Nietzschian Debugger

https://github.com/DilawarShafiq/nietzschian-debugger
102•dilawargopang•4h ago•30 comments

GPT-6.1 Terra

https://openai.com/index/introducing-gpt-6-1-terra/
388•meetpateltech•3h ago•239 comments

Microsoft offers voluntary buyouts to a quarter of its workforce

https://www.kuow.org/technology/2026-10-26/microsoft-offers-voluntary-buyouts-to-a-quarter-of-its...
42•mooreds•36m ago•12 comments

A Man from the Future: Why Johnny Can't Stop Abstracting

http://muratbuffalo.blogspot.com/2026/10/the-man-from-future-why-johnny-cant.html
70•aray07•3h ago•33 comments

Anthropic S-1

https://www.sec.gov/Archives/edgar/data/2130357/000162828026067168/anthropicpbc-sx1.htm
1352•SiNTEx•8h ago•1338 comments

Show HN: Hob - Open-source, on device alternative to Claude Cowork and ChatGPT

https://github.com/FrigadeHQ/hob
48•pancomplex•5h ago•15 comments

The EPA Is Quietly Killing Its Web Archive

https://www.motherjones.com/environment/2026/10/epa-online-archive-deletion-zeldin-camp-lejeune-t...
161•robtherobber•2h ago•23 comments

Sigma Says the Compact, Modular FP2 Is the Ultimate Hybrid Camera

https://petapixel.com/2026/10/22/sigma-says-the-compact-modular-fp2-is-the-ultimate-hybrid-camera/
31•thm•3d ago•25 comments

SIMD-accelerated computer vision on a $2 microcontroller

https://shraiwi.com/blog/simd-fast-esp32s3/
146•zdw•23h ago•47 comments

Diamond Transistor

https://www.df.com/diamond-transistor
98•Gravityloss•3d ago•55 comments

Microsoft offers mass buyouts for roughly a quarter of its workforce

https://www.seattletimes.com/business/microsoft/microsoft-offers-mass-buyouts-for-roughly-a-quart...
578•doctorzook•6h ago•492 comments

Blaise Pascal invented fixed route public transport (2024)

https://humantransit.org/2024/12/one-of-the-greatest-inventions-in-the-history-of-human-transport...
243•skadamat•4d ago•128 comments

Birdwatching rewires the brain and slows cognitive decline

https://www.bbc.com/future/article/20261019-birdwatching-rewires-the-brain-and-slows-cognitive-de...
475•cisc•2d ago•183 comments

Pharo 14

https://pharo.org/news/2026-10-26-Pharo14Release.html
216•xkriva11•10h ago•54 comments

US designates helium as a critical material

https://apnews.com/article/energy-critical-materials-minerals-helium-43da160adc1bad389fba0b9ffbd1...
127•rbanffy•3h ago•64 comments

In Leaked Audio, Flock CEO Tells Cops Backlash to the Company Isn't Real

https://www.404media.co/in-leaked-audio-flock-ceo-tells-cops-backlash-to-the-company-isnt-real/
190•Frieren•3h ago•104 comments

Show HN: Glider 4.0 Unofficial Web Edition (Mac game port)

https://dbohdan.github.io/glider/
19•networked•22h ago•4 comments

Who killed the EV cert? A browser whodunit for Halloween

https://qwac.com/blog/who-killed-the-ev-cert
8•roddylindsay•3d ago•12 comments

Concerning behavior from a popular open-weight AI model

https://cohere.com/blog/concerning-behaviour-popular-open-weight-ai-model
214•matthieu_bl•5h ago•79 comments

Switzerland. Block by block. At 1:1 scale

https://blocks.manifold3d.ch/
439•theanonymousone•12h ago•211 comments

Fixing Tool-Call Accuracy in vLLM

https://www.ubicloud.com/blog/fixing-tool-call-accuracy-in-vllm
139•coffeemug•8h ago•64 comments

Should Police Wipe a Criminal's Cellphone Before Returning It?–U.S. vs. Stathas

https://blog.ericgoldman.org/archives/2026/10/should-police-wipe-a-criminals-cellphone-before-ret...
37•hn_acker•4h ago•32 comments

ChatGPT Keeps Telling People 404 Media Can Solve Their Tech Support Problems

https://www.404media.co/chatgpt-keeps-telling-people-404-media-can-solve-their-tech-support-probl...
183•cdrnsf•4h ago•61 comments

An incremental approach to JIT construction

https://dl.acm.org/doi/10.1145/3830440.3832304
30•andsoitis•2d ago•1 comments

World Wars I and II Military Aviation Museum Collection

https://www.militaryaviationmuseum.org/our-collection/
22•NaOH•3d ago•10 comments

Skydance offers buyouts, orders return to office

https://variety.com/2026/film/news/skydance-voluntary-buyouts-layoffs-5-days-per-week-in-office-p...
63•metabagel•2h ago•15 comments
Open in hackernews

How ZGC allocates memory for the Java heap

https://joelsiks.com/posts/zgc-heap-memory-allocation/
86•lichtenberger•1y ago

Comments

gopalv•1y ago
The 32x virtual memory to physical memory ratio plays into relocation and colored pointers (i.e pointers where some bits serve as flag bits).

Putting the actual data layouts in 44 bits out of 64 is a neat trick which relies on the allocator being aware of the mappings between physical and virtual addresses.

twoodfin•1y ago
When your comment and the article refer to “physical” addresses, those are physical in the context of the JVM, right? To the OS they’re virtual addresses in the JVM process space?
acchow•1y ago
Correct. ZGC has no way to escape from the virtualization by the kernel (assuming your hardware and kernel uses an MMU)
MBCook•1y ago
Thank you for the answer, I was wondering that as well.
hinkley•1y ago
In the beginning of the 32 bit revolution, when the future was here but unevenly distributed, there was a lot of talk about how 32 bit pointers would fundamentally change how people wrote code. Among other things it got rid of a bunch of odd bookkeeping, and if you don’t have to do the bookkeeping you don’t have to write the code in a way that supports it, so you can do other things.

Not too long after someone asked what sort of interesting changes 64 bit will bring. And I’ve been keeping that question in the back of my mind ever since.

Aliasing memory multiple times in order to do read or write barriers and make GC much cheaper is a pretty good one. But another one I know of is that one of the secrets of the L4 microkernel is that its IPC speed comes substantially from reducing the amount of TLB work that needs to be done to switch to another process running in a different address space. They use the same address space and only swap out the access rights which cuts the call overhead in half. It’s pretty easy to put a bunch of processes into a 64 bit address space and just throw each one a randomly located 4GB slice of RAM.

twoodfin•1y ago
Yeah, would love to see the CPU vendors invent some primitives to let user code pull those kinds of privilege isolation tricks within a single process and address space.

Something like: “From now on, code on these pages can only access data on these pages, and only return to/call into other code through these gates…”

hinkley•1y ago
Thread based seems like it at least should be possible.
ahartmetz•1y ago
I've had some ideas about avoiding format validation in IPC receivers if the data is encoded by trusted code, which is also the only code that has rights to send the IPC data / to connect to the receiver. I can't really think of an important problem that it would solve, though. DBus always validates received data, but it's not really meant or very suitable for large amounts of data anyway.
pron•1y ago
For relevant upcoming changes see Automatic Heap Sizing for ZGC: https://openjdk.org/jeps/8329758
twoodfin•1y ago
What I’m looking for is a way for a process to de/re-escalate its privileges to access memory, without an expensive context switch being required at the transition. The CPU would simply enforce different rules based on (say) the high-order bits of the instruction pointer.

Imagine a server process that wants to run some elaborate third-party content parser. It’d be great to be sure that no matter how buggy or malicious that code, it can’t leak the TLS keys.

Today, high-security architectures must use process isolation to achieve this kind of architectural guarantee, but even finely tuned IPC like L4’s is an order of magnitude slower than a predictable jump.

gpderetta•1y ago
For a brief moment Intel supported MPX which did something similar.

You can also play tricks with the virtualization hardware, bit it need kernel support.

Eventually we will get segments back again.

MarkSweep•1y ago
That would be pretty cool. Something like the Win32 function GetWriteWatch, but implemented in hardware instead of the page fault handler (I assume).

https://learn.microsoft.com/en-us/windows/win32/api/memoryap...

Or some sort of special write barrier store op-code, idk.

mike_hearn•1y ago
It exists, that's called MPKs.
twoodfin•1y ago
I don’t think MPK’s will fit the need I have. Simply: Run some arbitrary, untrusted, non-sandboxed code in the same thread with assurance it can’t read page X. When that code completes and I’m back in code I trust, X is readable again.

Is that something MPK makes possible? The doc I’ve read suggests either your process can flip permission bits or it can’t. Great for avoiding out-of-sandbox reads. But if there’s arbitrary execution happening, why can’t that code flip the access to secrets back on?

mike_hearn•1y ago
Oracle Labs has tech that does that:

https://youtu.be/T05FI93MBI8?si=EieFgujaGiW2gbO8&t=958

The trick is to do a cascading disassembly of all untrusted code you'll execute to prove it can't change the MPK register.

twoodfin•1y ago
Wow. Neat trick and exactly the kind of thing I was looking for.

Thanks!

EDIT: Looks like this is the relevant paper from the Graal team: https://www.graalvm.org/resources/articles/binsweep.pdf

jdougan•1y ago
Is that something like the memory protection scheme on the Newton OS?
nyanpasu64•1y ago
Isn't not swapping page tables during a call precisely what the KPTI mitigations had to turn off for Meltdown mitigations?