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Xfwl4 – The Roadmap for a Xfce Wayland Compositor

https://alexxcons.github.io/blogpost_15.html
104•pantalaimon•2h ago•54 comments

I made my own Git

https://tonystr.net/blog/git_immitation
177•TonyStr•4h ago•71 comments

Heathrow scraps liquid container limit

https://www.bbc.com/news/articles/c1evvx89559o
474•robotsliketea•3d ago•634 comments

Snow Simulation Toy

https://potch.me/2026/snow-simulation-toy.html
78•surprisetalk•1w ago•20 comments

The Enchiridion by Epictetus

https://www.gutenberg.org/files/45109/45109-h/45109-h.htm
21•atropoles•3d ago•6 comments

Velox: A Port of Tauri to Swift by Miguel de Icaza

https://github.com/velox-apps/velox
109•wahnfrieden•1w ago•40 comments

The age of Pump and Dump software

https://tautvilas.medium.com/software-pump-and-dump-c8a9a73d313b
70•brisky•1h ago•20 comments

TikTok users can't upload anti-ICE videos. The company blames tech issues

https://www.cnn.com/2026/01/26/tech/tiktok-ice-censorship-glitch-cec
339•kotaKat•1h ago•197 comments

A list of fun destinations for telnet

https://telnet.org/htm/places.htm
215•tokyobreakfast•12h ago•70 comments

Show HN: We Built the 1. EU-Sovereignty Audit for Websites

https://lightwaves.io/en/eu-audit/
69•cmkr•1h ago•54 comments

9 Mothers (YC X26, Defense Tech) Is Hiring

https://jobs.ashbyhq.com/9-mothers?utm_source=x8pZ4B3P3Q
1•ukd1•3h ago

We Do Not Support Opt-Out Forms (2025)

https://consciousdigital.org/why-we-do-not-support-opt-out-forms/
47•mefengl•6h ago•14 comments

Kimi Released Kimi K2.5, Open-Source Visual SOTA-Agentic Model

https://www.kimi.com/blog/kimi-k2-5.html
348•nekofneko•9h ago•145 comments

Ask HN: Books to learn 6502 ASM and the Apple II

68•abkt•4h ago•39 comments

The C-Shaped Hole in Package Management

https://nesbitt.io/2026/01/27/the-c-shaped-hole-in-package-management.html
27•tanganik•5h ago•22 comments

Apple introduces new AirTag with longer range and improved findability

https://www.apple.com/newsroom/2026/01/apple-introduces-new-airtag-with-expanded-range-and-improv...
531•meetpateltech•1d ago•622 comments

The Universal Pattern Popping Up in Math, Physics and Biology (2013)

https://www.quantamagazine.org/in-mysterious-pattern-math-and-nature-converge-20130205/
103•kerim-ca•4d ago•38 comments

ChatGPT Containers can now run bash, pip/npm install packages and download files

https://simonwillison.net/2026/Jan/26/chatgpt-containers/
394•simonw•20h ago•278 comments

The hidden engineering of runways

https://practical.engineering/blog/2026/1/20/the-hidden-engineering-of-runways
366•crescit_eundo•6d ago•88 comments

Windows 11's Patch Tuesday nightmare gets worse

https://www.windowscentral.com/microsoft/windows-11/windows-11s-botched-patch-tuesday-update-nigh...
380•01-_-•1d ago•299 comments

There is an AI code review bubble

https://www.greptile.com/blog/ai-code-review-bubble
307•dakshgupta•23h ago•209 comments

Over 36,500 killed in Iran's deadliest massacre, documents reveal

https://www.iranintl.com/en/202601255198
672•mhb•1d ago•416 comments

I let ChatGPT analyze a decade of my Apple Watch data, then I called my doctor

https://www.msn.com/en-us/news/technology/i-let-chatgpt-analyze-a-decade-of-my-apple-watch-data-t...
185•zdw•17h ago•169 comments

JuiceSSH – Give me my pro features back

https://nproject.io/blog/juicessh-give-me-back-my-pro-features/
371•jandeboevrie•21h ago•151 comments

RIP Low-Code 2014-2025

https://www.zackliscio.com/posts/rip-low-code-2014-2025/
264•zackliscio•23h ago•136 comments

Refinement Without Specification

https://buttondown.com/hillelwayne/archive/refinement-without-specification/
16•BerislavLopac•6d ago•0 comments

India and EU announce landmark trade deal

https://www.bbc.com/news/articles/crrnee01r9jo
28•Palmik•3h ago•1 comments

Dithering – Part 2: The Ordered Dithering

https://visualrambling.space/dithering-part-2/
231•ChrisArchitect•20h ago•30 comments

Russia using Interpol's wanted list to target critics abroad, leak reveals

https://www.bbc.com/news/articles/c20gg729y1yo
176•breve•8h ago•55 comments

New York Times games are hard: A computational perspective

https://arxiv.org/abs/2509.10846
56•PaulHoule•4d ago•20 comments
Open in hackernews

How ZGC allocates memory for the Java heap

https://joelsiks.com/posts/zgc-heap-memory-allocation/
86•lichtenberger•9mo ago

Comments

gopalv•9mo ago
The 32x virtual memory to physical memory ratio plays into relocation and colored pointers (i.e pointers where some bits serve as flag bits).

Putting the actual data layouts in 44 bits out of 64 is a neat trick which relies on the allocator being aware of the mappings between physical and virtual addresses.

twoodfin•9mo ago
When your comment and the article refer to “physical” addresses, those are physical in the context of the JVM, right? To the OS they’re virtual addresses in the JVM process space?
acchow•9mo ago
Correct. ZGC has no way to escape from the virtualization by the kernel (assuming your hardware and kernel uses an MMU)
MBCook•9mo ago
Thank you for the answer, I was wondering that as well.
hinkley•9mo ago
In the beginning of the 32 bit revolution, when the future was here but unevenly distributed, there was a lot of talk about how 32 bit pointers would fundamentally change how people wrote code. Among other things it got rid of a bunch of odd bookkeeping, and if you don’t have to do the bookkeeping you don’t have to write the code in a way that supports it, so you can do other things.

Not too long after someone asked what sort of interesting changes 64 bit will bring. And I’ve been keeping that question in the back of my mind ever since.

Aliasing memory multiple times in order to do read or write barriers and make GC much cheaper is a pretty good one. But another one I know of is that one of the secrets of the L4 microkernel is that its IPC speed comes substantially from reducing the amount of TLB work that needs to be done to switch to another process running in a different address space. They use the same address space and only swap out the access rights which cuts the call overhead in half. It’s pretty easy to put a bunch of processes into a 64 bit address space and just throw each one a randomly located 4GB slice of RAM.

twoodfin•9mo ago
Yeah, would love to see the CPU vendors invent some primitives to let user code pull those kinds of privilege isolation tricks within a single process and address space.

Something like: “From now on, code on these pages can only access data on these pages, and only return to/call into other code through these gates…”

hinkley•9mo ago
Thread based seems like it at least should be possible.
ahartmetz•9mo ago
I've had some ideas about avoiding format validation in IPC receivers if the data is encoded by trusted code, which is also the only code that has rights to send the IPC data / to connect to the receiver. I can't really think of an important problem that it would solve, though. DBus always validates received data, but it's not really meant or very suitable for large amounts of data anyway.
twoodfin•9mo ago
What I’m looking for is a way for a process to de/re-escalate its privileges to access memory, without an expensive context switch being required at the transition. The CPU would simply enforce different rules based on (say) the high-order bits of the instruction pointer.

Imagine a server process that wants to run some elaborate third-party content parser. It’d be great to be sure that no matter how buggy or malicious that code, it can’t leak the TLS keys.

Today, high-security architectures must use process isolation to achieve this kind of architectural guarantee, but even finely tuned IPC like L4’s is an order of magnitude slower than a predictable jump.

gpderetta•9mo ago
For a brief moment Intel supported MPX which did something similar.

You can also play tricks with the virtualization hardware, bit it need kernel support.

Eventually we will get segments back again.

MarkSweep•9mo ago
That would be pretty cool. Something like the Win32 function GetWriteWatch, but implemented in hardware instead of the page fault handler (I assume).

https://learn.microsoft.com/en-us/windows/win32/api/memoryap...

Or some sort of special write barrier store op-code, idk.

mike_hearn•9mo ago
It exists, that's called MPKs.
twoodfin•9mo ago
I don’t think MPK’s will fit the need I have. Simply: Run some arbitrary, untrusted, non-sandboxed code in the same thread with assurance it can’t read page X. When that code completes and I’m back in code I trust, X is readable again.

Is that something MPK makes possible? The doc I’ve read suggests either your process can flip permission bits or it can’t. Great for avoiding out-of-sandbox reads. But if there’s arbitrary execution happening, why can’t that code flip the access to secrets back on?

mike_hearn•9mo ago
Oracle Labs has tech that does that:

https://youtu.be/T05FI93MBI8?si=EieFgujaGiW2gbO8&t=958

The trick is to do a cascading disassembly of all untrusted code you'll execute to prove it can't change the MPK register.

twoodfin•9mo ago
Wow. Neat trick and exactly the kind of thing I was looking for.

Thanks!

EDIT: Looks like this is the relevant paper from the Graal team: https://www.graalvm.org/resources/articles/binsweep.pdf

jdougan•9mo ago
Is that something like the memory protection scheme on the Newton OS?
nyanpasu64•9mo ago
Isn't not swapping page tables during a call precisely what the KPTI mitigations had to turn off for Meltdown mitigations?
pron•9mo ago
For relevant upcoming changes see Automatic Heap Sizing for ZGC: https://openjdk.org/jeps/8329758