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Median net worth of U.S. households under 35 fell 23% from 2022 to 2025 (real)

https://www.keepingup.com/benchmarks/net-worth/age-30-33
143•jpmulhausen•1h ago•54 comments

Astra can read and write weights to improve Qwen

https://rikiyat.github.io/blog/weight-space-programming/
2174•dbreunig•10h ago•707 comments

Show HN: Hacker Times, a New York Times-inspired version of Hacker News

https://hackertimes.ca/
97•polpenn•2h ago•40 comments

DiscImageStudio: burn visible artwork onto CDs, DVDs and Blu-ray discs

https://github.com/JiaFeiMiao-K-Cat/DiscImageStudio
87•bpierre•3h ago•22 comments

Show HN: Subvocal – Talk to your computer without making noise

602•aarushyadav•11h ago•319 comments

Scaling Git at OpenAI

https://openai.com/index/scaling-git-at-openai/
100•makeramen•4h ago•33 comments

US boy names that became girl names and vice versa

https://namedaisy.com/blog/boy-names-that-became-girl-names
332•xoobdev•12h ago•331 comments

Open-Source 5G Ran Platforms: A Dual Perspective on Performance and Capabilities

https://arxiv.org/abs/2608.25820
11•teleforce•1h ago•0 comments

If you love a website, back it up

https://blog.mistys-internet.website/post/2026/10/29/if-you-love-a-website-back-it-up/
448•ingve•15h ago•100 comments

Resisting Cognitive Surrender

https://knlb.dev/essays/surrender
36•knlb•1d ago•8 comments

Launch HN: Momentic (YC W24) – Agents that catch bugs by using your app

https://momentic.ai/
134•wuweiweiwu•11h ago•89 comments

Show HN: Warsaw in voxels – An interactive 3D map of the city centre

https://p.migdal.pl/warsaw-vibe-voxel/
230•stared•12h ago•37 comments

Self-Employed? Solopreneur? NIST Has a Cybersecurity Guide Just for You

https://www.nist.gov/news-events/news/2026/11/self-employed-solopreneur-nist-has-cybersecurity-gu...
143•tomrod•10h ago•43 comments

Intel stock collapse worsens as $3.5T chip rout spreads

https://finance.yahoo.com/markets/article/the-intel-stock-collapse-is-getting-worse--and-the-37-t...
146•entryleveljobsc•4h ago•95 comments

SLAC researchers find proof of altermagnetism, a new magnetic phase

https://www6.slac.stanford.edu/news/2026-10-29-slac-researchers-find-proof-altermagnetism-new-mag...
49•gmays•6h ago•8 comments

Ask HN: Who is hiring? (November 2026)

187•whoishiring•12h ago•153 comments

European RISC-V Industrial Computing Initiative

https://erici.eu
4•ymz5•19h ago•0 comments

The SEC Should Block Anthropic's IPO to Protect the Public

https://www.techpolicy.press/the-sec-should-block-anthropics-ipo-to-protect-the-public/
256•cdrnsf•6h ago•192 comments

Egoless Mathematics in the AI Era

https://terrytao.wordpress.com/2026/11/02/egoless-mathematics-in-the-ai-era/
132•smilelamp•9h ago•92 comments

Own Your HackerTube,an AI Curator Inspired by Karpathy's HackerTube

https://ownhackertube.cc/
4•RileyMorgan093•1h ago•0 comments

Trademarks and Symbols, Volume 2: Symbolical Designs (1973)

https://www.symbools.com/kuwayama-trademarks-symbols-vol-2/
13•NaOH•2d ago•4 comments

Show HN: Rustable is an open source database client built in Rust

https://rustable.app
9•JaTochNietDan•1h ago•4 comments

Ubuntu still has not released patch for Linux 0day RCE in almost 3 weeks

https://freenode.net/article/ubuntu-lts-kernels-still-unfixed-for-critical-cve-2026-98432
387•majorchord•9h ago•108 comments

Polyend releases the Tracker firmware source code

https://polyend.com/whats-up/tracker-the-biggest-update-yet/
100•austinallegro•11h ago•30 comments

V100 SXM2 pinout and NVLink reference

https://github.com/pigeon-labs-stack/v100-sxm2-reference
21•airhangerf15•6h ago•2 comments

WTF Ubuntu?

https://chalmovsky.com/posts/wtf-ubuntu
1386•chalmovsky•13h ago•595 comments

Sneaking into the auditorium for the Windows 2000 launch rehearsal

https://devblogs.microsoft.com/oldnewthing/20261102-00/?p=112818/
118•ibobev•10h ago•43 comments

Bitmovin (YC S15) Is Hiring Technical Graduates in Denver (Engineering/CS Focus)

https://bitmovin.com/careers/8660599002/
1•slederer•11h ago

Skill to Create Product Videos

https://github.com/aaitor/skill-video-studio
78•aaitor•10h ago•22 comments

We halved DNS build delay and cut memory use by 85%

https://blog.cloudflare.com/dns-targeted-zone-builds/
167•wondersky•13h ago•65 comments
Open in hackernews

How ZGC allocates memory for the Java heap

https://joelsiks.com/posts/zgc-heap-memory-allocation/
86•lichtenberger•1y ago

Comments

gopalv•1y ago
The 32x virtual memory to physical memory ratio plays into relocation and colored pointers (i.e pointers where some bits serve as flag bits).

Putting the actual data layouts in 44 bits out of 64 is a neat trick which relies on the allocator being aware of the mappings between physical and virtual addresses.

twoodfin•1y ago
When your comment and the article refer to “physical” addresses, those are physical in the context of the JVM, right? To the OS they’re virtual addresses in the JVM process space?
acchow•1y ago
Correct. ZGC has no way to escape from the virtualization by the kernel (assuming your hardware and kernel uses an MMU)
MBCook•1y ago
Thank you for the answer, I was wondering that as well.
hinkley•1y ago
In the beginning of the 32 bit revolution, when the future was here but unevenly distributed, there was a lot of talk about how 32 bit pointers would fundamentally change how people wrote code. Among other things it got rid of a bunch of odd bookkeeping, and if you don’t have to do the bookkeeping you don’t have to write the code in a way that supports it, so you can do other things.

Not too long after someone asked what sort of interesting changes 64 bit will bring. And I’ve been keeping that question in the back of my mind ever since.

Aliasing memory multiple times in order to do read or write barriers and make GC much cheaper is a pretty good one. But another one I know of is that one of the secrets of the L4 microkernel is that its IPC speed comes substantially from reducing the amount of TLB work that needs to be done to switch to another process running in a different address space. They use the same address space and only swap out the access rights which cuts the call overhead in half. It’s pretty easy to put a bunch of processes into a 64 bit address space and just throw each one a randomly located 4GB slice of RAM.

twoodfin•1y ago
Yeah, would love to see the CPU vendors invent some primitives to let user code pull those kinds of privilege isolation tricks within a single process and address space.

Something like: “From now on, code on these pages can only access data on these pages, and only return to/call into other code through these gates…”

hinkley•1y ago
Thread based seems like it at least should be possible.
ahartmetz•1y ago
I've had some ideas about avoiding format validation in IPC receivers if the data is encoded by trusted code, which is also the only code that has rights to send the IPC data / to connect to the receiver. I can't really think of an important problem that it would solve, though. DBus always validates received data, but it's not really meant or very suitable for large amounts of data anyway.
pron•1y ago
For relevant upcoming changes see Automatic Heap Sizing for ZGC: https://openjdk.org/jeps/8329758
twoodfin•1y ago
What I’m looking for is a way for a process to de/re-escalate its privileges to access memory, without an expensive context switch being required at the transition. The CPU would simply enforce different rules based on (say) the high-order bits of the instruction pointer.

Imagine a server process that wants to run some elaborate third-party content parser. It’d be great to be sure that no matter how buggy or malicious that code, it can’t leak the TLS keys.

Today, high-security architectures must use process isolation to achieve this kind of architectural guarantee, but even finely tuned IPC like L4’s is an order of magnitude slower than a predictable jump.

gpderetta•1y ago
For a brief moment Intel supported MPX which did something similar.

You can also play tricks with the virtualization hardware, bit it need kernel support.

Eventually we will get segments back again.

MarkSweep•1y ago
That would be pretty cool. Something like the Win32 function GetWriteWatch, but implemented in hardware instead of the page fault handler (I assume).

https://learn.microsoft.com/en-us/windows/win32/api/memoryap...

Or some sort of special write barrier store op-code, idk.

mike_hearn•1y ago
It exists, that's called MPKs.
twoodfin•1y ago
I don’t think MPK’s will fit the need I have. Simply: Run some arbitrary, untrusted, non-sandboxed code in the same thread with assurance it can’t read page X. When that code completes and I’m back in code I trust, X is readable again.

Is that something MPK makes possible? The doc I’ve read suggests either your process can flip permission bits or it can’t. Great for avoiding out-of-sandbox reads. But if there’s arbitrary execution happening, why can’t that code flip the access to secrets back on?

mike_hearn•1y ago
Oracle Labs has tech that does that:

https://youtu.be/T05FI93MBI8?si=EieFgujaGiW2gbO8&t=958

The trick is to do a cascading disassembly of all untrusted code you'll execute to prove it can't change the MPK register.

twoodfin•1y ago
Wow. Neat trick and exactly the kind of thing I was looking for.

Thanks!

EDIT: Looks like this is the relevant paper from the Graal team: https://www.graalvm.org/resources/articles/binsweep.pdf

jdougan•1y ago
Is that something like the memory protection scheme on the Newton OS?
nyanpasu64•1y ago
Isn't not swapping page tables during a call precisely what the KPTI mitigations had to turn off for Meltdown mitigations?