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DeepSeek v4.1 Flash

https://twitter.com/deepseek_ai/status/2097930608790167907
368•Liwink•3h ago•158 comments

iPhone Duo

https://www.apple.com/iphone-duo/
1215•thecosmicfrog•15h ago•2123 comments

Stockfish 19

https://stockfishchess.org/blog/2026/stockfish-19/
38•atiedebee•2d ago•12 comments

Show HN: What if the speed of light was 5 km/h?

https://rivendell.dmitrybrant.com/relativity/
333•dmitrybrant•8h ago•145 comments

What algorithm did Windows XP use to choose your initial user picture?

https://devblogs.microsoft.com/oldnewthing/20260909-00/?p=112683
15•soheilpro•1h ago•3 comments

Larger Pacific Striped Octopus

https://en.wikipedia.org/wiki/Larger_Pacific_striped_octopus
63•olalonde•1d ago•31 comments

Shopify acquires Tailwind

https://tailwindcss.com/blog/tailwind-is-joining-shopify
1038•EdwinHoksberg•20h ago•395 comments

What do Visa and Mastercard do? An intro to card networks

https://tautology.town/2026/06/01/card-networks.html
536•evakhoury•1d ago•311 comments

Growing proof that autonomous cars save lives

https://spectrum.ieee.org/are-self-driving-cars-safe
348•bookofjoe•16h ago•606 comments

I think I hate the internet

https://strategictree.bearblog.dev/i-think-i-hate-the-internet/
36•saikatsg•3h ago•13 comments

Samsung Debuts zHBM Prototype, Stacking Memory Directly on AI Accelerators

https://www.thelec.net/news/articleView.html?idxno=12835
19•peter_d_sherman•3d ago•3 comments

No Man's Sky Cosmos

https://www.nomanssky.com/cosmos-update/
390•Limb•18h ago•400 comments

GPT-6 Astra, looped transformers, and hidden reasoning

https://magazine.sebastianraschka.com/p/gpt-6-astra-looped-transformers-and
434•ModelForge•19h ago•141 comments

AirPods 5

https://www.apple.com/newsroom/2026/09/apple-introduces-airpods-5-with-best-in-class-open-ear-act...
457•awad•16h ago•385 comments

iPhone 18 Pro and iPhone 18 Pro Max

https://www.apple.com/newsroom/2026/09/apple-debuts-iphone-18-pro-and-iphone-18-pro-max/
365•meetpateltech•16h ago•398 comments

Open Source Durable Objects for Postgres

https://solidobjects.dev/blog/introducing-solidobjects
16•cardmagic•1d ago•3 comments

Show HN: Compute polynomials twice as fast

https://thomasahle.com/fast-polynomials/
92•thomasahle•1d ago•30 comments

Automattic's board forces CEO Matt Mullenweg into leave of absence

https://techcrunch.com/2026/09/09/automattics-board-forces-ceo-matt-mullenweg-into-leave-of-absence/
273•LeoPanthera•10h ago•191 comments

Training a 3.8B LLM to 0.384 CORE for $998

https://hugovergnes.github.io/little-lm-3-8b/
77•Anon84•8h ago•13 comments

All grown-ups were once children, but only few of them remember it

https://mathstodon.xyz/@tao/117244102901892965
168•yurivish•6h ago•127 comments

Aardman (Wallace and Gromit) Is Selling Its Original Movie Puppets

https://gizmodo.com/aardman-is-selling-its-original-movie-puppets-this-month-2000807968
52•Gaishan•3d ago•10 comments

Desert Ant Labs: local, fast models that run on device

https://desertant.com/blog/introducing-desert-ant-labs/
449•willwhitedc•22h ago•96 comments

Qwen 3.8 follows GPT-5.5 Pro reasoning prefills

https://gist.github.com/wsxiaoys/e0286dc6bb624ff5fdf49e7f4c528ba3
215•wsxiaoys•16h ago•85 comments

Factoring RSA 260

https://cognition.com/blog/factoring-rsa-260
98•samyok•13h ago•11 comments

Version control second coming

https://psantosl.github.io/posts/version-control-second-coming/
88•bananaboy•2d ago•59 comments

Apple Watch Series 12

https://www.apple.com/newsroom/2026/09/introducing-apple-watch-series-12-with-the-all-new-health-...
258•Lealen•16h ago•320 comments

How I advertise malicious software on Google Ads

https://xlii.space/eng/malicious-software-on-google-ads/
407•xlii•22h ago•246 comments

ESP32 Bit Pirate Hardware Hacking Kit with Web Tools That Speaks Every Protocol

https://geo-tp.github.io/ESP32-Bit-Pirate/
95•geotp•3d ago•31 comments

The UN challenges five centuries of cartography

https://www.not-ship.com/united-nations-map/
95•speckx•17h ago•197 comments

Rivian's gambit for full autonomy

https://spectrum.ieee.org/rivian-self-driving
81•1970-01-01•1d ago•95 comments
Open in hackernews

How ZGC allocates memory for the Java heap

https://joelsiks.com/posts/zgc-heap-memory-allocation/
86•lichtenberger•1y ago

Comments

gopalv•1y ago
The 32x virtual memory to physical memory ratio plays into relocation and colored pointers (i.e pointers where some bits serve as flag bits).

Putting the actual data layouts in 44 bits out of 64 is a neat trick which relies on the allocator being aware of the mappings between physical and virtual addresses.

twoodfin•1y ago
When your comment and the article refer to “physical” addresses, those are physical in the context of the JVM, right? To the OS they’re virtual addresses in the JVM process space?
acchow•1y ago
Correct. ZGC has no way to escape from the virtualization by the kernel (assuming your hardware and kernel uses an MMU)
MBCook•1y ago
Thank you for the answer, I was wondering that as well.
hinkley•1y ago
In the beginning of the 32 bit revolution, when the future was here but unevenly distributed, there was a lot of talk about how 32 bit pointers would fundamentally change how people wrote code. Among other things it got rid of a bunch of odd bookkeeping, and if you don’t have to do the bookkeeping you don’t have to write the code in a way that supports it, so you can do other things.

Not too long after someone asked what sort of interesting changes 64 bit will bring. And I’ve been keeping that question in the back of my mind ever since.

Aliasing memory multiple times in order to do read or write barriers and make GC much cheaper is a pretty good one. But another one I know of is that one of the secrets of the L4 microkernel is that its IPC speed comes substantially from reducing the amount of TLB work that needs to be done to switch to another process running in a different address space. They use the same address space and only swap out the access rights which cuts the call overhead in half. It’s pretty easy to put a bunch of processes into a 64 bit address space and just throw each one a randomly located 4GB slice of RAM.

twoodfin•1y ago
Yeah, would love to see the CPU vendors invent some primitives to let user code pull those kinds of privilege isolation tricks within a single process and address space.

Something like: “From now on, code on these pages can only access data on these pages, and only return to/call into other code through these gates…”

hinkley•1y ago
Thread based seems like it at least should be possible.
ahartmetz•1y ago
I've had some ideas about avoiding format validation in IPC receivers if the data is encoded by trusted code, which is also the only code that has rights to send the IPC data / to connect to the receiver. I can't really think of an important problem that it would solve, though. DBus always validates received data, but it's not really meant or very suitable for large amounts of data anyway.
pron•1y ago
For relevant upcoming changes see Automatic Heap Sizing for ZGC: https://openjdk.org/jeps/8329758
twoodfin•1y ago
What I’m looking for is a way for a process to de/re-escalate its privileges to access memory, without an expensive context switch being required at the transition. The CPU would simply enforce different rules based on (say) the high-order bits of the instruction pointer.

Imagine a server process that wants to run some elaborate third-party content parser. It’d be great to be sure that no matter how buggy or malicious that code, it can’t leak the TLS keys.

Today, high-security architectures must use process isolation to achieve this kind of architectural guarantee, but even finely tuned IPC like L4’s is an order of magnitude slower than a predictable jump.

gpderetta•1y ago
For a brief moment Intel supported MPX which did something similar.

You can also play tricks with the virtualization hardware, bit it need kernel support.

Eventually we will get segments back again.

MarkSweep•1y ago
That would be pretty cool. Something like the Win32 function GetWriteWatch, but implemented in hardware instead of the page fault handler (I assume).

https://learn.microsoft.com/en-us/windows/win32/api/memoryap...

Or some sort of special write barrier store op-code, idk.

mike_hearn•1y ago
It exists, that's called MPKs.
twoodfin•1y ago
I don’t think MPK’s will fit the need I have. Simply: Run some arbitrary, untrusted, non-sandboxed code in the same thread with assurance it can’t read page X. When that code completes and I’m back in code I trust, X is readable again.

Is that something MPK makes possible? The doc I’ve read suggests either your process can flip permission bits or it can’t. Great for avoiding out-of-sandbox reads. But if there’s arbitrary execution happening, why can’t that code flip the access to secrets back on?

mike_hearn•1y ago
Oracle Labs has tech that does that:

https://youtu.be/T05FI93MBI8?si=EieFgujaGiW2gbO8&t=958

The trick is to do a cascading disassembly of all untrusted code you'll execute to prove it can't change the MPK register.

twoodfin•1y ago
Wow. Neat trick and exactly the kind of thing I was looking for.

Thanks!

EDIT: Looks like this is the relevant paper from the Graal team: https://www.graalvm.org/resources/articles/binsweep.pdf

jdougan•1y ago
Is that something like the memory protection scheme on the Newton OS?
nyanpasu64•1y ago
Isn't not swapping page tables during a call precisely what the KPTI mitigations had to turn off for Meltdown mitigations?