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Cherenkov Radiation - traveling faster than light

http://www.iaea.org/newscenter/news/what-is-cherenkov-radiation
70•andsoitis•2h ago•50 comments

Shopify is moving from React Native back to Swift and Kotlin

https://shopify.engineering/back-to-native
1086•fnthawar2•20h ago•777 comments

Claude is no longer available for minors

https://support.claude.com/en/articles/15171100-age-assurance-on-claude
4•Muhammad523•19m ago•0 comments

So you want to use OpenRouter?

https://mmoustafa.com/blog/so-you-want-to-use-openrouter/
138•player85•2d ago•19 comments

Don't let anyone take away your big box of cables

https://blog.jim-nielsen.com/2026/hands-off-my-cables/
561•Brajeshwar•19h ago•361 comments

The Death of Shame Is Tearing Us Apart

https://www.newyorker.com/news/fault-lines/the-death-of-shame-is-tearing-us-apart
12•Michelangelo11•1h ago•13 comments

Working with Git Worktrees in Magit

https://emacsredux.com/blog/2026/09/02/working-with-git-worktrees-in-magit/
59•srijan4•3d ago•19 comments

OpenAI Agents API

https://developers.openai.com/api/docs/guides/agents-api/overview
272•aquir•15h ago•151 comments

The Deathray: A simple way for an untrusted site to freeze a Mac

https://auberon.xyz/blog/posts/deathray/
209•auberonedu•15h ago•131 comments

Mexican student creates an acoustic fire extinguisher to put out fire in seconds

https://www.upsocl.com/en/16-year-old-mexican-student-creates-an-acoustic-fire-extinguisher-that-...
238•rguiscard•10h ago•83 comments

Resist "AI"

https://ronjeffries.com/articles/-v026/x/t/
23•mborch•47m ago•6 comments

CSS Curiosities of the Past

https://vale.rocks/posts/css-relics
14•robin_reala•3h ago•4 comments

Technique for Manipulating Satellite Photos Now Reveals Ancient Images (2025)

https://spinoff.nasa.gov/Manipulating_Satellite_Photos_Now_Reveals_Ancient_Images
343•gumby•19h ago•56 comments

GPT‑Live‑1 in the API

https://openai.com/index/introducing-gpt-live-1-in-the-api/
30•arittr•5h ago•26 comments

Neijuan

https://en.wikipedia.org/wiki/Neijuan
45•vermilingua•2h ago•12 comments

Nine coding harnesses vs. your laptop

https://nasutton.notion.site/Nine-coding-harnesses-vs-your-laptop-3d139990182b80d59fa3cf500f0450b...
111•nasutton12•12h ago•32 comments

More questions about whether researchers can trust OpenAI with unpublished math

https://mathstodon.xyz/@andreasthom/117240535270608201
822•pred_•1d ago•754 comments

Cognition launches new SWE-2 model, Rivaling Fable 5.1 and GPT-Astra

https://cognition.com/blog/swe-2
420•seelos•19h ago•175 comments

Music Theory for the 21st-Century Classroom

https://musictheory.pugetsound.edu/mt21c/MusicTheory.html
237•aanet•17h ago•101 comments

Forgejo <=16.0.3 Critical RCE

https://codeberg.org/forgejo/forgejo/src/branch/forgejo/release-notes-published/16.0.4.md
192•weierstass•19h ago•72 comments

Neki – Sharded Postgres

https://planetscale.com/blog/introducing-neki
250•simon_weber•19h ago•132 comments

iPod Classic 6G in QEMU

https://www.reddit.com/r/emulation/s/VL4Au2HGxq
13•dmonterocrespo•2d ago•2 comments

Proof of Capture: Apple Reference Image, but open source and using steganography

https://merybenavente.me/blog/proof-of-capture
114•merybenavente•15h ago•64 comments

NTSB issues investigative update on B-767 runway excursion accident in Miami

https://www.ntsb.gov:443/news/press-releases/Pages/NR20260909.aspx
108•mckn1ght•13h ago•192 comments

An interactive tour of the spanning tree protocol

https://vincent.bernat.ch/en/blog/2026-spanning-tree
10•zdw•2d ago•1 comments

Rust is tier-1 language at Microsoft

https://rustfoundation.org/media/guest-post-rust-is-tier-1-language-at-microsoft/
682•mmastrac•21h ago•436 comments

Detecting and countering misuse of AI: September 2026

https://www.anthropic.com/threat-intelligence-report-september-2026
138•garo-pro•17h ago•202 comments

Testing race conditions with mem access tracing and stack-based delay injection

https://projectzero.google/2026/09/maccconc-race-condition.html
11•mfrw•2d ago•0 comments

Douglas Hofstadter: Analogy as the Core of Cognition [video]

https://www.youtube.com/watch?v=n8m7lFQ3njk
185•tosh•4d ago•81 comments

Recursion into madness

https://blog.coredump.cx/p/recursion-into-madness
76•surprisetalk•3d ago•18 comments
Open in hackernews

How ZGC allocates memory for the Java heap

https://joelsiks.com/posts/zgc-heap-memory-allocation/
86•lichtenberger•1y ago

Comments

gopalv•1y ago
The 32x virtual memory to physical memory ratio plays into relocation and colored pointers (i.e pointers where some bits serve as flag bits).

Putting the actual data layouts in 44 bits out of 64 is a neat trick which relies on the allocator being aware of the mappings between physical and virtual addresses.

twoodfin•1y ago
When your comment and the article refer to “physical” addresses, those are physical in the context of the JVM, right? To the OS they’re virtual addresses in the JVM process space?
acchow•1y ago
Correct. ZGC has no way to escape from the virtualization by the kernel (assuming your hardware and kernel uses an MMU)
MBCook•1y ago
Thank you for the answer, I was wondering that as well.
hinkley•1y ago
In the beginning of the 32 bit revolution, when the future was here but unevenly distributed, there was a lot of talk about how 32 bit pointers would fundamentally change how people wrote code. Among other things it got rid of a bunch of odd bookkeeping, and if you don’t have to do the bookkeeping you don’t have to write the code in a way that supports it, so you can do other things.

Not too long after someone asked what sort of interesting changes 64 bit will bring. And I’ve been keeping that question in the back of my mind ever since.

Aliasing memory multiple times in order to do read or write barriers and make GC much cheaper is a pretty good one. But another one I know of is that one of the secrets of the L4 microkernel is that its IPC speed comes substantially from reducing the amount of TLB work that needs to be done to switch to another process running in a different address space. They use the same address space and only swap out the access rights which cuts the call overhead in half. It’s pretty easy to put a bunch of processes into a 64 bit address space and just throw each one a randomly located 4GB slice of RAM.

twoodfin•1y ago
Yeah, would love to see the CPU vendors invent some primitives to let user code pull those kinds of privilege isolation tricks within a single process and address space.

Something like: “From now on, code on these pages can only access data on these pages, and only return to/call into other code through these gates…”

hinkley•1y ago
Thread based seems like it at least should be possible.
ahartmetz•1y ago
I've had some ideas about avoiding format validation in IPC receivers if the data is encoded by trusted code, which is also the only code that has rights to send the IPC data / to connect to the receiver. I can't really think of an important problem that it would solve, though. DBus always validates received data, but it's not really meant or very suitable for large amounts of data anyway.
pron•1y ago
For relevant upcoming changes see Automatic Heap Sizing for ZGC: https://openjdk.org/jeps/8329758
twoodfin•1y ago
What I’m looking for is a way for a process to de/re-escalate its privileges to access memory, without an expensive context switch being required at the transition. The CPU would simply enforce different rules based on (say) the high-order bits of the instruction pointer.

Imagine a server process that wants to run some elaborate third-party content parser. It’d be great to be sure that no matter how buggy or malicious that code, it can’t leak the TLS keys.

Today, high-security architectures must use process isolation to achieve this kind of architectural guarantee, but even finely tuned IPC like L4’s is an order of magnitude slower than a predictable jump.

gpderetta•1y ago
For a brief moment Intel supported MPX which did something similar.

You can also play tricks with the virtualization hardware, bit it need kernel support.

Eventually we will get segments back again.

MarkSweep•1y ago
That would be pretty cool. Something like the Win32 function GetWriteWatch, but implemented in hardware instead of the page fault handler (I assume).

https://learn.microsoft.com/en-us/windows/win32/api/memoryap...

Or some sort of special write barrier store op-code, idk.

mike_hearn•1y ago
It exists, that's called MPKs.
twoodfin•1y ago
I don’t think MPK’s will fit the need I have. Simply: Run some arbitrary, untrusted, non-sandboxed code in the same thread with assurance it can’t read page X. When that code completes and I’m back in code I trust, X is readable again.

Is that something MPK makes possible? The doc I’ve read suggests either your process can flip permission bits or it can’t. Great for avoiding out-of-sandbox reads. But if there’s arbitrary execution happening, why can’t that code flip the access to secrets back on?

mike_hearn•1y ago
Oracle Labs has tech that does that:

https://youtu.be/T05FI93MBI8?si=EieFgujaGiW2gbO8&t=958

The trick is to do a cascading disassembly of all untrusted code you'll execute to prove it can't change the MPK register.

twoodfin•1y ago
Wow. Neat trick and exactly the kind of thing I was looking for.

Thanks!

EDIT: Looks like this is the relevant paper from the Graal team: https://www.graalvm.org/resources/articles/binsweep.pdf

jdougan•1y ago
Is that something like the memory protection scheme on the Newton OS?
nyanpasu64•1y ago
Isn't not swapping page tables during a call precisely what the KPTI mitigations had to turn off for Meltdown mitigations?