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TinyTinyTPU: 2×2 systolic-array TPU-style matrix-multiply unit deployed on FPGA

https://github.com/Alanma23/tinytinyTPU-co
45•Xenograph•2h ago

Comments

hinkley•1h ago
I think I could trust AI more if we used it to do heuristics for expensive deterministic processes. Sort of a cross between Bloom Filters and speculative execution. Determine the odds the expensive operation 1 will indicate that expensive operation 2 needs to happen, and then start expensive operation 2 while we determine if it’s actually needed. If its right 95% of the time, which is the sort of ranges AI can aspire to, that’s skipping the high latency task chaining 19 times out of 20, which would be pretty good.
rjsw•1h ago
There have been comments that some leading AI researchers were switching away from working on language models to do stuff with "real world data".
hnuser123456•51m ago
There are Bayesian neural networks that could apparently track probability rather than just e.g. randomly selecting one output from the top-k based on probability, but I'm still learning up on them myself. Sounds like they're not normally combined with language models.
aunty_helen•1h ago
I think it’s only a matter of time before we see asic vendors making TPU devices. Same thing happened with BTC. There was enough money there to spawn an industry. Nvidias 70% margins are too hard to ignore. And if playing on the open market seems too rough, there’s always acquisition potential like what happened to groq.
NitpickLawyer•1h ago
Aren't high end accelerators already closer to ASICs than to og GPUs, tho?
fooblaster•1h ago
Great! How do you program it?
ph4evers•29m ago
Such a cool project! Next one is to run jaxprs via the driver?
mrinterweb•18m ago
I've been wondering when we will see general purpose consumer FPGAs, and eventually ASICs, for inference. This reminds me of bitcoin mining. Bitcoin mining started with GPUs. I think I remember a brief FPGA period that transitioned to ASIC. My limited understanding of Google's tensor processing unit chips are that they are effectively a transformer ASIC. That's likely a wild over-simplification of Google's TPU, but Gemini is proof that GPUs are not needed for inference.

I suspect GPU inference will come to an end soon, as it will likely be wildly inefficient by comparison to purpose built transformer chips. All those Nvidia GPU-based servers may become obsolete should transformer ASICs become mainstream. GPU bitcoin mining is just an absolute waste of money (cost of electricity) now. I believe the same will be true for GPU-based inference soon. The hundreds of billions of dollars being invested on GPU-based inference seems like an extremely risky bet that ASIC transformers won't happen, although Google has already widely deployed their own TPUs.

tucnak•6m ago
It all comes down to memory and fabric bandwidth. For example, the state of the art developer -friendly (PCIe 5.0) FPGA platform is Alveo V80 which rocks four 200G NIC's. Basically, Alveo currently occupies this niche where it's the only platform on the market to allow programmable in-network compute. However, what's available in terms of bandwidth—lags behind even pathetic platforms like Bluefield. Those in the know are aware of what challenges are there to actually saturate it for inference in practical designs. I think, Xilinx is super well-positioned here, but without some solid hard IP it's still a far cry from purpose silicon.
babl-yc•14m ago
This is cool. I'm observing a trend of "build a tiny version from the ground-up to understand it" a la Karpathy's micrograd/minGPT. Seems like one of the best ways to learn.

Publish (On Your) Own Site, Syndicate Elsewhere

https://indieweb.org/POSSE#
129•47thpresident•1h ago•26 comments

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70•pjmlp•2h ago•25 comments

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215•whoishiring•5h ago•117 comments

TinyTinyTPU: 2×2 systolic-array TPU-style matrix-multiply unit deployed on FPGA

https://github.com/Alanma23/tinytinyTPU-co
46•Xenograph•2h ago•10 comments

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