A while back, I got frustrated with the state of accessible BCI hardware. Research gear was wildly unaffordable. So, I spent a ton of time designing a custom board, software and firmware to bridge that gap. I call it the Cerelog ESP-EEG. It is open-source (Firmware + Schematics), and I designed it specifically to fix the signal integrity issues found in most DIY hardware.
I believe in sharing the work. You can find the Schematics, Firmware, and Software setup on the GitHub repo: GITHUB LINK: https://github.com/Cerelog-ESP-EEG/ESP-EEG
For those who don't want to deal with BGA soldering or sourcing components, I do have assembled units available: https://www.cerelog.com/eeg_researchers.html
The major features: Forked/modified OpenBCI GUI Compatibility as well as Brainflow API, and LSL Compatibility. I know a lot of us rely on the OpenBCI GUI for visualization because it just works. I didn't want to reinvent the wheel, so I ensured this board supports it natively.
It works out of the box: I maintain a forked modified version of the GUI that connects to the board via LSL (Lab Streaming Layer). Zero coding required: You can visualize FFTs, Spectrograms, and EMG widgets immediately without writing a single line of Python.
The "active bias" (why my signal is cleaner): The TI ADS1299 is the gold standard for EEG, but many dev boards implement it incorrectly. They often leave the Bias feedback loop "open" (passive), which makes them terrible at rejecting 60Hz mains hum. I simply followed the datasheet: I implemented a True Closed-Loop Active Bias (Drive Right Leg).
How it works: It measures the common-mode signal, inverts it, and actively drives it back into the body. The result: Cleaner data
Tech stack:
ADC: TI ADS1299 (24-bit, 8-channel).
MCU: ESP32 Chosen to handle high-speed SPI and WiFi/USB streaming
Software: BrainFlow support (Python, C++, Java, C#) for those who want to build custom ML pipelines, LSL support, and forked version of OpenBCI GUI support
This was a huge project for me. I’m happy to geek out about getting the ESP32 to stream reliably at high sample rates as both the software and firmware for this project proved a lot more challenging than I expected. Let me know what you think!SAFETY NOTE: I strongly recommend running this on a LiPo battery via WiFi. If you must use USB, please use a laptop running on battery power, not plugged into the wall.
simontheHWguy•1d ago
https://www.cnx-software.com/2025/12/26/cerelog-esp-eeg-a-lo...
And here
https://www.hackster.io/news/this-open-source-eeg-board-brin...
dang•1d ago
Welcome to HN! I hope your project gets some good discussion.