AXI SystemVerilog synthesizable FPGA IP modules and verification infrastructure for high-performance on-chip communication:
https://github.com/pulp-platform/axi
Verilog PCI express related FPGA components with PCIe to AXI and AXI lite bridges and a flexible, high-performance DMA subsystem:
https://github.com/alexforencich/verilog-pcie
peter_d_sherman•54m ago
AXI SystemVerilog synthesizable FPGA IP modules and verification infrastructure for high-performance on-chip communication:
https://github.com/pulp-platform/axi
Verilog PCI express related FPGA components with PCIe to AXI and AXI lite bridges and a flexible, high-performance DMA subsystem:
https://github.com/alexforencich/verilog-pcie