> Consequently, the NYU researchers’ goal is to make chip design more accessible, so nonengineers, whatever their background can create their own custom-made chips.
What?
bigyabai•17m ago
I'm just as confused as you are, honestly. It feels like we've seen the "ASIC for everything" campaign so many times over, and yet only FPGAs and CUDA typically find adoption in the industry.
A lot of my questions went away when I got to this line though:
> He’s also fully engaged in the third leg of the “democratizing chip design” stool: education.
This is a valiant effort. Chip design is a hard world to break into, and many applications that could benefit from ASICs aren't iterating or testing on it because it sucks to do. It's a lot of work to bring that skill ceiling down, but as a programmer I could see how an LLVM-style intermediate representation layer could help designers get up-and-running faster.
fleshmonad•22m ago
We have textual slop, visual slop, audio slop, so we asked: "What else do we want to sloppify?". And then it dawned on me. ICs. ICs haven't been slopped yet — sure, we could ask the machine to generate some vhdl, but that isn't the same. So we present: Silicon Slop.
I am actually astonished. Is this what happens when the NYU board of directors tells every department they have to use and create AI, or they will stop funding? What is going on?
alecco•46m ago
What?
bigyabai•17m ago
A lot of my questions went away when I got to this line though:
> He’s also fully engaged in the third leg of the “democratizing chip design” stool: education.
This is a valiant effort. Chip design is a hard world to break into, and many applications that could benefit from ASICs aren't iterating or testing on it because it sucks to do. It's a lot of work to bring that skill ceiling down, but as a programmer I could see how an LLVM-style intermediate representation layer could help designers get up-and-running faster.