Performance will get “good enough” over the next 2 years. Prices will drop after that.
The SpacemiT K3 has the multi-core performance of a 2019 MacBook Air and higher AI performance than an M4. That is better multi-core than an RK3588. If it were less expensive, the K3 would already be good enough for many people.
Alibaba has the C930 which is faster than the K3. We will see if it gets released to the rest of us.
Tenstorrent will release a chip in a few months that is twice as fast as the K3.
The recently announced C950 is supposed to be even faster but will be a year or more.
Of course, “good enough” is subjective but my statement was based on the above.
But you are right that there have been some false starts.
The SG2380 was just as fast as K3 and was ready to go two years ago. TSMC refused to manufacture it over US sanctions.
Ventana was about to release a very fast RISC-V chip but Qualcomm bought them.
Rivos was very close to releasing a RISC-V GPU but Meta bought them.
But even without these high-end chips, RISC-V is enjoying great success. It is taking over the microcontroller space. And billions of RISC-V cores are shipping.
“Good enough” here was meant to mean good enough to sell more, and therefore to drop prices.
That is already happening. It just needs to happen more. And I think it will. If you don’t find the RISC-V boards of 24 months from now “good enough”, that is ok with me. I just want them to get cheaper.
The other thing that is happening on that front is that microcontrollers are getting more powerful and staying inexpensive. You can get RISC-V microcontrollers today with similar performance to the original Raspberry Pi and with things like WiFi, Bluetooth, and USB. They are crazy cheap and there are many projects for which they are now “good enough”. And, of course, they keep getting better.
The SpacemiT K3 is faster than QEMU. Much faster chips are expected to release over the next few months.
I mean things like the Milk-V Pioneer were already faster but expensive.
One thing that has been frustrating about RISC-V is that many companies close to releasing decent chips have been bought and then those chips never appear (Ventana, Rivos, etc). That and US sanctions (eg. Sophgo SG2380).
At least for SBCs, I’ve bought a few orange pi rv2s and r2s to use as builder nodes, and in some cases they are slower than the same thing running in qemu w/buildx or just qemu
The vast majority of the ecosystem seems to be focused on uCs until very recently. So it'll take time for the applications processors to be competitive.
Tenstorrent Ascalon, expected later this year, is expected to be AMD Ryzen 5 speeds. Tenstorrent hopes to achieve Apple Silicon speeds in a few years.
The SpacemiT K3 is about half as fast as Ascalon and available in April. K3 is 3-4 times faster than the K1 (previous generation).
This should give you an idea about how fast RISC-V is improving.
Certainly not in the Atlantis SoC, due to the older fab node used. Zen2-3 territory IPC is the expectation, with lower clocks than these actually got.
By the time they have the necessary scale to use the best fabs, they'll be tapping out something newer than the Ascalon that went into Atlantis.
Tenstorrent expects to reach parity with the best x86 and arm chips by 2028.
I can't see any reason why the father of Zen and the designer of the M1 can't make a core for the simpler RISC-V ISA with basically the same (or better) µarch than the M1.
Besides RVA23 compliance, these are dramatically faster than earlier chips, enough for most people's everyday computing needs i.e. web browsing, video decoding and such. K3 got close to rpi5 per-core performance, but with more cores, better peripherals, and 32GB RAM possible, although unfortunately current RAM prices are no good.
And it'll only get better from there, as other, much faster, RVA23 chips like Tenstorrent Alastor ship later this year.
Alastor is something else; a core from Tenstorrent that is considerably smaller than Ascalon.
Particularly for my use case, Go cross compilation, QEMU and binfmt work really well together.
Still, for some things, it's nice to test on actual hardware.
Here's a workflow so you can see both approaches working: https://github.com/ncruces/wasm2go/blob/main/.github/workflo...
RV64GC (C910 cores)
Western0•1d ago
mhitza•1d ago
It's also aimed at open-source projects, for free, with the intent to improve RISC-V support.
heliumtera•1d ago
PufPufPuf•1d ago
ctz•1d ago
LeFantome•1d ago
The idea is to promote testing on RISC-V and to eliminate lack of hardware for being the reason not to. Obviously, low budget projects and Open Source are the primary targets. Commercial products can afford real RISC-V hardware.
This is who you are trusting: https://riseproject.dev/members/
jubilanti•1d ago
downrightmike•1d ago
throawayonthe•1d ago
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jrave•1d ago