ScholarlyArticle: "Vistara: Making CXL Real—Full Path from ASIC Design and OS Support to Hyperscale Deployment" (2026) https://aisystemcodesign.github.io/papers/isca26/vistara_cam...

TIL there are 2x 2.5GbE PCI-E HAT adapters for Pi 5.

How to attach RAM to the new NVLink/UALink fiber buses?

The interesting part of this "RAM crisis" is similar to other fields where a problem results multiple parties looking for alternative solutions.

This yields for exciting ideas or workarounds that might result a post-crisis memory boom (hopefully) also for local machines.

1. Lowest, Apple is evaluating new Chinese manufacturer which means change of supply demand if indeed it has reasonable QA. (https://www.ft.com/content/f4ac5c92-03be-4499-b16a-017a7e9ee...)

2. Companies tries to workaround performance - suddenly single channel is 'ok' ? :) (https://www.gigabyte.com/press/news/2403)

Why not go directly to the source article that has a lot more details?

https://www.theregister.com/systems/2026/06/29/zuck-saves-me...