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fp.

NPM debug and chalk packages compromised

https://www.aikido.dev/blog/npm-debug-and-chalk-packages-compromised
337•universesquid•1h ago•159 comments

Signal Secure Backups

https://signal.org/blog/introducing-secure-backups/
61•keyboardJones•33m ago•26 comments

Job Mismatch and Early Career Success

https://www.nber.org/papers/w34215
50•jandrewrogers•1h ago•6 comments

Our data shows San Francisco tech workers are working Saturdays

https://ramp.com/velocity/san-francisco-tech-workers-996-schedule
37•hnaccount_rng•52m ago•23 comments

Experimenting with Local LLMs on macOS

https://blog.6nok.org/experimenting-with-local-llms-on-macos/
113•frontsideair•2h ago•68 comments

OpenWrt: A Linux OS targeting embedded devices

https://openwrt.org/
29•pykello•1h ago•4 comments

Clankers Die on Christmas

https://remyhax.xyz/posts/clankers-die-on-christmas/
107•jerrythegerbil•2h ago•53 comments

Dietary omega-3 polyunsaturated fatty acids as a protective factor of myopia

https://bjo.bmj.com/content/early/2025/08/17/bjo-2024-326872
52•FollowingTheDao•2h ago•28 comments

Will Amazon S3 Vectors Kill Vector Databases–Or Save Them?

https://zilliz.com/blog/will-amazon-s3-vectors-kill-vector-databases-or-save-them
30•Fendy•1h ago•26 comments

Firefox 32-bit Linux Support to End in 2026

https://blog.mozilla.org/futurereleases/2025/09/05/firefox-32-bit-linux-support-to-end-in-2026/
20•AndrewDucker•3d ago•3 comments

Google gets away almost scot-free in US search antitrust case

https://www.computerworld.com/article/4052428/google-gets-away-almost-scot-free-in-us-search-anti...
111•CrankyBear•1h ago•47 comments

Meta suppressed research on child safety, employees say

https://www.washingtonpost.com/investigations/2025/09/08/meta-research-child-safety-virtual-reality/
300•mdhb•4h ago•171 comments

Browser Fingerprint Detector

https://fingerprint.goldenowl.ai/
29•eustoria•2h ago•18 comments

Immich – High performance self-hosted photo and video management solution

https://github.com/immich-app/immich
236•rzk•9h ago•75 comments

Building an acoustic camera with UMA-16 and Acoular

https://www.minidsp.com/applications/usb-mic-array/acoustic-camera-uma16
16•tomsonj•3d ago•1 comments

A complete map of the Rust type system

https://rustcurious.com/elements/
59•ashvardanian•4h ago•3 comments

14 Killed in anti-government protests in Nepal

https://www.tribuneindia.com/news/world/massive-protests-in-nepal-over-social-media-ban/
480•whatsupdog•5h ago•319 comments

Using Claude Code to modernize a 25-year-old kernel driver

https://dmitrybrant.com/2025/09/07/using-claude-code-to-modernize-a-25-year-old-kernel-driver
788•dmitrybrant•17h ago•257 comments

What if artificial intelligence is just a "normal" technology?

https://www.economist.com/finance-and-economics/2025/09/04/what-if-artificial-intelligence-is-jus...
36•mooreds•4h ago•25 comments

RSS Beat Microsoft

https://buttondown.com/blog/rss-vs-ice
178•vidyesh•6h ago•118 comments

The MacBook has a sensor that knows the exact angle of the screen hinge

https://twitter.com/samhenrigold/status/1964428927159382261
946•leephillips•1d ago•451 comments

Why Is Japan Still Investing in Custom Floating Point Accelerators?

https://www.nextplatform.com/2025/09/04/why-is-japan-still-investing-in-custom-floating-point-acc...
176•rbanffy•2d ago•58 comments

VMware's in court again. Customer relationships rarely go this wrong

https://www.theregister.com/2025/09/08/vmware_in_court_opinion/
178•rntn•5h ago•114 comments

American Flying Empty Airbus A321neo Across the Atlantic 20 Times

https://onemileatatime.com/news/american-flying-empty-airbus-a321neo-across-atlantic/
34•corvad•1h ago•34 comments

We Rarely Lose Technology (2023)

https://www.hopefulmons.com/p/we-rarely-lose-technology
37•akkartik•3d ago•38 comments

Indiana Jones and the Last Crusade Adventure Prototype Recovered for the C64

https://www.gamesthatwerent.com/2025/09/indiana-jones-and-the-last-crusade-adventure-prototype-re...
76•ibobev•5h ago•8 comments

Formatting code should be unnecessary

https://maxleiter.com/blog/formatting
299•MaxLeiter•18h ago•398 comments

'We can do it for under $100M': Startup joins race to build local ChatGPT

https://www.afr.com/technology/we-can-do-it-for-under-100m-start-up-joins-race-to-build-local-cha...
43•yakkomajuri•2h ago•10 comments

Integer Programming (2002) [pdf]

https://web.mit.edu/15.053/www/AMP-Chapter-09.pdf
19•todsacerdoti•3d ago•4 comments

Writing by manipulating visual representations of stories

https://github.com/m-damien/VisualStoryWriting
38•walterbell•3d ago•8 comments
Open in hackernews

Why Is Japan Still Investing in Custom Floating Point Accelerators?

https://www.nextplatform.com/2025/09/04/why-is-japan-still-investing-in-custom-floating-point-accelerators/
176•rbanffy•2d ago

Comments

numpad0•9h ago
It's unfortunate that they don't sell them on open markets. There are few of these accelerators that could threaten NVIDIA monopoly if prices(and manufacturing costs!) were right.
WithinReason•7h ago
The hardware is the easy part of accelerating NN training. Nvidia's software and infrastructure is so well designed and established that no competitor can threaten them even if they give away the hardware for free.
saagarjha•7h ago
I don't know about well designed but it's definitely established.
WithinReason•7h ago
Who has better software than Nvidia for NN training? Meaning the least amount of friction getting a new network to train.
saagarjha•7h ago
Just because their tools are the best doesn't mean they are designed well.
jacquesm•5h ago
I've used DSPs, custom boards with compute hardware (FPGA image processing), and various kinds of GPUs. I would have a very hard time trying to point to ways in which the NVIDIA toolkit could be compared to what's out there and not come away with a massive sense of relief. For the most part 'it just works', the models are generic enough that you can actually get pretty close to the TDP on your own workloads with custom software and yet specific enough that you'll find stuff that makes your work easier most of the time.

I really can't complain, now, FPGAs, however... And if there ever is a company that comes out and improves substantially on this I'll be happy for sure but if you asked me off the bat what they should improve I honestly wouldn't know, especially not taking into account that this was an incremental effort over ~2 decades and that originated in an industry that has nothing to do with the main use case today and some detours into unrelated industries besides (crypto, for instance).

From fluid dynamics, FEA, crypto, gaming, genetics, AI and many others with a single generic architecture and delivering very good performance is no mean feat.

I'd love to hear in what way you would improve on their toolset.

programjames•4h ago
Not the guy you replied to, but here are some improvements that feel obvious:

1. Memory indexing. It's a pain to avoid banking conflicts, and implement cooperative loading on transposed matrices. To improve this, (1) pop up a warning when banking conflicts are detected, (2) make cooperative loading solved by the compiler. It wouldn't be too hard to have a second form of indexing memory_{idx} that the compiler solves a linear programming problem for to maximize throughput (do you spend more thread cycles cooperative loading, or are banking conflicts fine because you have other things to work on?)

2. Why is there no warning when shared memory is unspecified? It isn't hard to check if you're accessing an index that might not have been assigned a value. The compiler should pop out a warning and assign it to 0.0, or maybe even just throw an error.

3. Timing - doesn't exist. Pretty much the gold standard is to run your kernel 10_000 times in a loop and subtract the time from before and after the loop. This isn't terribly important, I'm just getting flashbacks to before I learned `timeit` was a thing in Python.

jacquesm•3h ago
Those are good and actionable suggestions. Have you passed these on to NVIDIA?

https://forums.developer.nvidia.com/c/accelerated-computing/...

They regularly have threads asking for such suggestions.

But I don't think they rise to the general conclusion that the tooling is bad.

numpad0•2h ago
Who cares. It's viable so long llama.cpp works and does 15 tok/s at under 500W or so. Whether the device accomplish that figure with a 8b q1 or a 1T BF16 weight files is not a fundamental boolean limiting factor, there will probably be some uses for such an instrument as proto-AGI devices.

There is a type of research called traffic surveys, which involves hiring few men with adequate education to sit or stand at an intersection for one whole day to count numbers of passing entities by types. YOLO wasn't accurate enough. I have gut feeling that vision enabled LLM would be. That doesn't require constant update or upgrades to latest NN innovations so no need to do full CUDA, so long one known good weight files work.

CoastalCoder•7h ago
Could you elaborate?

I've only done a little work on CUDA, but I was pretty impressed with it and with their NSys tools.

I'm curious what you wish was different.

saagarjha•6h ago
I actually really hate CUDA's programming model and feel like it's too low-level to actually get any productive work done. I don't really blame Nvidia because they basically invented the programmable GPU and it wouldn't be fair to have them also come up with the perfect programming model right out of the gate but at this point it's pretty clear that having independent threads work on their own programs makes no sense. High performance code requires scheduling across multiple threads in a way that is completely different if you are coming from CPUs.

Of course, one might mention that GPUs are nothing like CPUs–but the programming model works super hard to try to hide this. So it's not really well designed in my book. I actually quite like the compilers that people are designing these days to write block-level code, because I feel like it better represents the work people want to do and then you pick which way you want it lowered.

As for Nsight (Systems), it is…ok, I guess? It's fine for games and stuff I guess but for HPC or AI it doesn't really surface the information that you would want. People who are running their GPUs really hard know they have kernels running all the time and what the performance characteristics of them are. Nsight Compute is the thing that tells you that but it's kind of a mediocre profiler (some of this may be limitations of hardware performance counters) and to use it effectively you basically have to read a bunch of blog posts by people instead of official documentation.

Despite not having used it much, my impression was that Nvidia's "moat" was that they have good networking libraries, that they are pretty good (relatively) and making sure all their tools work, and they have had consistent investment on this for a decade.

electroglyph•6h ago
i mean, it could be worse... it could be Vulkan
jandrewrogers•2h ago
GPUs are a type of barrel processor, which are optimized for workloads without cache locality. As a fundamental principle, they replace the CPU cache with latency hiding behavior. Consequently, you can't use algorithms and data structures designed for CPUs, since most of those assume the existence of a CPU cache. Some things are very cheap on a barrel processor that are very expensive on a CPU and vice versa, which changes the way you think about optimization.

The wide vectors on GPUs are somewhat irrelevant. Scalar barrel processors exist and have the same issues. A scalar barrel processor feels deceptively CPU-like and will happily compile and run normal CPU code. The performance will nonetheless be poor unless the C++ code is designed to be a good fit for the nature of a barrel processor, code which will look weird and non-idiomatic to someone who has only written code for CPUs.

There is no way to hide that a barrel processor is not a CPU even though they superficially have a lot of CPU-like properties. A barrel processor is extremely efficient once you learn to write code for them and exceptionally well-suited to HPC since they are not latency-sensitive. However, most people never learn how to write proper code for barrel processors.

Ironically, barrel processor style code architecture is easy to translate into highly optimized CPU code, just not the reverse.

glitchc•24m ago
I wanted to upvote you originally, but I'm afraid this is not correct. A GPU is not a barrel processor. In a barrel processor a single context is switched between multiple threads after each instruction. A barrel processor design has a singular instruction pipeline and a singular cache across all threads. In a GPU, due to the independence of the execution units, those threads will execute those instructions concurrently on all cores, as long as a program-based instruction dependency between threads is not introduced. It's true parallelism. Furthermore, each execution unit embeds its own instruction scheduler, it's own pipeline and its own L1 cache (see [1] for NVidia's architecture).

[1] https://docs.nvidia.com/deeplearning/performance/dl-performa...

KeplerBoy•7h ago
It's not all about NNs and AI. Take a look at the Top500, a lot of people are doing classical HPC work on Nvidia GPUs, which are increasingly not designed for this. Unfortunately the HPC market is just a lot smaller than the AI bubble.
rwmj•6h ago
If the hardware isn't available at all, we'll never find out if the software moat could be overcome.
DrNosferatu•6h ago
> if they give away the hardware for free.

Seriously doubt that: free hardware (or 10s of bucks) would galvanize the community and achieve huge support - look at the Raspberry Pi project original prices and the consequences.

DrNosferatu•2h ago
In fact, if any such thing would happen, I would wager Nvidia stock would tank massively.

Say, release has extensions to a RISC-V design.

DrNosferatu•31m ago
*as :D
londons_explore•5h ago
The math of NN training isn't complex at all. Designing the software stack to make a new pytorch backend is very doable with the budgets these AI companies have.

I suspect that whenever you look like you're making good progress on this front, nvidia gives you a lot of chips for free on condition you shelve the effort though!

The latest example being Tesla, who were designing their own hardware and software stack for NN training, then suspiciously got huge numbers of H100's ahead of other clients and cancelled the dojo effort.

AlotOfReading•3h ago
I doubt that's what happened. They had designs that were massively expensive to fab/package, had much worse performance than the latest Nvidia hardware, and still needed massive amounts of custom in-house development.

To combat all of these issues, they were fighting with Nvidia (and losing) for access to leading edge nodes, which kept going up in price. Their personnel costs kept rising as the company became more politicized, people left to join other companies (e.g. densityai), and they became embroiled in the salary wars to replace them.

My suspicion is that Musk told them to just buy Nvidia instead of waiting around for years of slow iteration to get something competitive.

The custom silicon I was involved with experienced similar issues. It was too expensive and slow to try competing with Nvidia, and no one could stomach the costs to do so.

nromiun•4h ago
I don't know why you are getting downvoted. This is 100% true. It's not like you can take any random data and train it into a NN. You have to transform the data, you have to write the low level GPU kernels which will actually run fast on that particular GPU, you also have to get the output and transform that as well. All of this is hard and very much impossible to create from scratch.

If people use PyTorch on a Nvidia GPU they are running layers and layers of code written by those that know how to write fast kernels for GPUs. In some cases they use assembly as well.

Nvidia stuck to one stack and wrote all their high level libraries on it, while their competitors switched from old APIs to new ones and never made anything close to CUDA.

woooooo•3h ago
Because in the context of LLM transformers, you really just need matrix multiplication to be hyper-optimized, it's 90-99% (citation needed) of the FLOPs. Get some normalization and activation functions in and you're good to go. It's not a massive software ecosystem.

CUDA and CUBLAS being capable of a bunch of other things is really cool, and would take a long time to catch up with, but getting the bare minimum to run LLMs on any platform with a bunch of GDDR7 channels and cores at a reasonable price would have people writing torch/ggml backends within weeks.

nromiun•3h ago
Have you tried to write a kernel for basic matrix multiplication? Because I have and I can assure you it is very hard to get 50% of maximum FLOPs, let alone 90%. It is nothing like CPUs where you write a * b in C and get 99% of the performance by the compiler.

Here is an example of how hard it is: https://siboehm.com/articles/22/CUDA-MMM

And this is just basic matrix mult. If you add activation functions it will slow down even more. There is nothing easy about GPU programming, if you care about performance. CUDA gives you all that optimization on a plate.

woooooo•3h ago
Well, CUDA gives you a whole programming language where you have to figure out the optimization for your particular card's cache size and bus width.

I'm saying the API surface of what to offer for LLMs is pretty small. Yeah, optimizing it is hard but it's "one really smart person works for a few weeks" hard, and most of the tiling techniques are public. Speaking of which, thanks for that blog post, off to read it now.

kadushka•44m ago
it's "one really smart person works for a few weeks" hard

AMD should hire that one really smart person.

adgjlsfhk1•21m ago
yeah they really should. the primary reason AMD or behind in the GPU space is that they massively under-prioritize software.
pclmulqdq•6h ago
They do sell these on the open market. You just have to be in the market for an entire cluster. The minimum order quantity for Pezy is several racks.
numpad0•2h ago
I thought they're more like "wire us our share of METI grant, we'll forward it to TSMC". Besides they wouldn't be going anywhere if that was chasing away 100% of customers.

Another one of these I still sometimes think about is NEC VectorEngine - they had 5 TFLOPS FP32 with 48GB of HBM2 totaling 1.5TB/s bandwidth at $10k in 2020. That was within a digit or two against NVIDIA at basically the same price. But they then didn't capitalize on it, just kept delivering to national institutes in ritualistic manners.

I do have basic conceptual understanding of these grant businesses and have vague intuitions as to how bureaucracy wants substantial capital investments and report files without commercial capitalizations, with emphasis on the last part, as it would disrupt internal politics inside government agencies and also creates unfair government competitive pressure against civilian sectors, but at some point it starts looking like cash campfires. I don't know exactly how slow are M4 Mac Studios relative to NVIDIA Tesla clusters normalized for VRAM, but they're considered comparable regardless just because they run LLMs at 10-20 tok/s. So it's just, unfortunate, that these accelerators of basically same nature as M-series CPUs are built, kept on idle, and then recycled.

The one that is in my mind as "no way these brochure figures are real" is PFN MN-Core - though it looks like they might be doing an LLM specific variant in the future. Hopefully they retail them.

thiago_fm•8h ago
Great article documenting PEZY. It's incredible how close they are from NVidia despite being a very small team.

To me, this looks like a win.

Governments are there to finance projects like this that enable the country to have certain skillsets that wouldn't exist otherwise because of other countries having better solutions in the global market.

eru•6h ago
Governments are terrible at picking winners.
actionfromafar•6h ago
Everyone is, and what survives, survives.

But what governments often can do, is break local optimums clustering around the quarter economy and take moonshot chances and find paths otherwise never taken. Hopefully one of these paths are great.

The difficult thing becomes deciding when to pull the plug. Is ITER a good thing or not? (Results wise, it is, but for the money? Who can tell really.)

elzbardico•4h ago
There wouldn't be a Silicon Valley without the DARPA and NASA.
p_l•3h ago
Or just plain military procurement, even before ARPA existed.
aaa_aaa•3h ago
There definitely could be. The incentive, mindset and invention spirit was there. Probably darpa and nasa even hindered competition.
acdha•4h ago
So are companies (Itanium, Windows Mobile, etc.) but what governments do well is funding the competitive baseline needed for big advances. We live in an age of wonders invented based on American research investment in the mid-20th century, and that worked because the government did not try to pick winners but invested in good work by qualified people (everything NIH, NAF, etc. do by competitive grants) or by promising to pay for capabilities not yet available (a lot of NASA and military stuff).

Just like it doesn’t work to try an ecosystem based on one species, a society has to blend government and private spending. They work on different incentives and timeframes, and both have pitfalls that the other might handle better.

glitchc•22m ago
No one is good at picking winners. Governments, like VCs, are best when they spread the wealth across many different projects.
rfoo•4h ago
How what?

The fp64 GFLOPS per watt metric in the post is almost entirely meaningless to compare between these accelerators and NVIDIA GPUs, for example it says

> Hopper H200 is 47.9 gigaflops per watt at FP64 (33.5 teraflops divided by 700 watts)

But then if you consider H100 PCIe [0] instead, it's going to be 26000/350 = 74.29 GFLOPS per watt. If you go look harder you can find ones with better on-paper fp64 performance, for example AMD MI300X has 81.7 TFLOPs with typical board power of "750W Peak", which gives 108.9 GFLOPS per watt.

The truth is the power allocation of most GPGPUs are heavily tilted for Tensor usages. This has been the trend well before B300.

That's all for HPC.

And Pezy processors are certainly not designed for "AI" (i.e. linear algebra with lower input precision). For AI inference starting from 2020 everyone is talking about how many T(FL)OPS per watt, not G.

[0] which is a nerfed version of H200's precursor.

kragen•8h ago
Fascinating. https://en.m.wikipedia.org/wiki/Single_program,_multiple_dat... explains the relation to SIMT.
sylware•6h ago
Last time I heard about that it was for "super computers": nearly or even faster than the alternatives with a massive energy consumption advantage.
pclmulqdq•6h ago
Pezy and the other Japanese native chips are first and foremost about HPC. The world may have picked up AI in the last 2 years, but the Japanese chipmakers are still thinking primarily about HPC, with AI as just one HPC workload.

These Pezy chips are also made for large clusters. There is a whole system design around the chips that wasn't presented here. The Pezy-SC2, for instance, was built around liquid immersion cooling. I am not sure you could ever buy an air-cooled version.

VladVladikoff•4h ago
>liquid immersion cooling

Is the whole board submersed in liquid? Or just the processor?

neom•4h ago
https://www.wikiwand.com/en/articles/Gyoukou

"Each immersion tank can contain 16 Bricks. A Brick consists of a backplane board, 32 PEZY-SC2 modules, 4 Intel Xeon D host processors, and 4 InfiniBand EDR cards. Modules inside a Brick are connected by hierarchical PCI Express fabric switches, and the Bricks are interconnected by InfiniBand."

numpad0•2h ago
I remember some offhand remarks on that. Apparently the rooms for these systems had cheap ladles hanged somewhere and engineers would have fun scooping out water puddles collecting on top of enclosures full of fluorinert coolants. That's tanks full of PFAS in layman's terms...
renewiltord•20m ago
Funny site. Seems to be a reskin of the Wikipedia article https://en.wikipedia.org/wiki/Gyoukou
spwa4•4h ago
> Pezy-SC2, for instance, was built around liquid immersion cooling

Well that was a disappointing end to a sentence. I was hoping another company would invest a few million in HPC to play SC2!

https://www.youtube.com/watch?v=UuhECwm31dM

ghaff•5h ago
It may also be worth noting that Japan has a pretty long history of marching to their own drummer in computing. They either created their own architectures or adopted others after pretty much everyone had moved on.
johnklos•3h ago
When you're building your own CPUs, why be beholden to US companies for GPUs? This makes perfect sense.

GPUs are great if your workload can use them, but not so great for more general tasks. These are more appropriate to more traditional supercomputing tasks, as in they're not optimized for lower precision AI stuff, like NVIDIA GPUs are.

Aissen•3h ago
Because the LLM craze has rendered last-gen Tensor accelerators from NVIDIA (& others) useless for all those FP64 HPC workloads. From the article:

> The Hopper H200 is 47.9 gigaflops per watt at FP64 (33.5 teraflops divided by 700 watts), and the Blackwell B200 is rated at 33.3 gigaflops per watt (40 teraflops divided by 1,200 watts). The Blackwell B300 has FP64 severely deprecated at 1.25 teraflops and burns 1,400 watts, which is 0.89 gigaflops per watt. (The B300 is really aimed at low precision AI inference.)

kbolino•2h ago
Do cards with intentionally handicapped FP64 actually use anywhere near their TDP when doing FP64? It's my understanding that FP64 performance is limited at the hardware level--whether by fusing off the extra circuits, or omitting them from the die entirely--in order to prevent aftermarket unlocks. So I would be quite surprised if the card could draw that much power when it's intentionally using only a small fraction of the silicon.
Aissen•2h ago
It's really to save die space for other functions, AFAIU there is no fusing to lock the features or anything like this.
kbolino•1h ago
I'm finding conflicting info on this. It seems to be down to the specific GPU/core/microarchitecture. In some cases, the "missing" FP64 units do physically exist on the dies, but have been disabled--likely some of them were defective in manufacturing anyway--and this disabling can't be undone with custom firmware AFAIK (though I believe modern nVidia cards will only load nVidia-signed firmware anyway). Then, there are also dies that don't include the "missing" FP64 units at all, and so there's nothing to disable (though manufacturing defects may still lead to other components getting disabled for market segmentation and improved yields). This also seems to be changing over time; having lots of FP64 units and disabling them on consumer cards seems to have been more common in the past.

Nevertheless, my point is more that if FP64 performance is poor on purpose, then you're probably not using anywhere near the card's TDP to do FP64 calculations, so FLOPS/watt(TDP) is misleading.

wtallis•51m ago
In general: consumer cards with very bad FP64 performance have it fused off for product segmentation reasons, datacenter GPUs with bad FP64 performance have it removed from the chip layout to specialize for low precision. In either case, the main concern shouldn't be FLOPS/W but the fact that you're paying for so much silicon that doesn't do anything useful for HPC.
niklassheth•26m ago
I know some consumer cards have artificially limited FP64, but the AI focused datacenter cards have physically fewer FP64 units. Recently, the GB300 removed almost all of them, to the point that a GB300 actually has less FP64 TFLOPS than a 9 year old P100. FP32 is the highest precision used during training so it makes sense.
andrepd•1h ago
I wonder how much progress (if any) is being done on floating point formats other than IEEE floats; on serious adoption in hardware in particular. Stuff like posits [1] for instance look very promising.

[1] https://posithub.org/docs/posit_standard-2.pdf

adgjlsfhk1•16m ago
the problem with posits is that they aren't enough better to be worth a switch. switching the industry over would cost billions in software rewrites and there are benefits, but they are fairly marginal.
retube•25m ago
What is an "accelerator" in this context?