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Jurassic Park computers in excruciating detail

https://fabiensanglard.net/jurrasic_park_computers/index.html
362•vinhnx•5h ago•86 comments

RISC-V Is Inevitable: State of the Union Keynote Argues

https://www.eetimes.com/risc-v-is-inevitable-state-of-the-union-keynote-argues/
38•signa11•2h ago•12 comments

I tricked Claude into leaking your deepest, darkest secrets

https://www.ayush.digital/blog/the-memory-heist
185•macleginn•1h ago•70 comments

Vancouver PD website features Quick Escape button that wipes itself from history

https://vpd.ca/
253•LookAtThatBacon•8h ago•99 comments

TS-2026-009: Insecure argument handling in Tailscale SSH permitted root access

https://tailscale.com/security-bulletins
141•jervant•7h ago•62 comments

Bonsai 27B: A 27B-Class model that runs on a phone

https://prismml.com/news/bonsai-27b
567•xenova•14h ago•206 comments

Andon (manufacturing)

https://en.wikipedia.org/wiki/Andon_(manufacturing)
43•tony•3d ago•8 comments

The Tower Keeps Rising

https://lucumr.pocoo.org/2026/7/13/the-tower-keeps-rising/
450•cdrnsf•15h ago•215 comments

Dependabot version updates introduce default package cooldown

https://github.blog/changelog/2026-07-14-dependabot-version-updates-introduce-default-package-coo...
168•woodruffw•11h ago•107 comments

Cursor 0day: When Full Disclosure Becomes the Only Protection Left

https://mindgard.ai/blog/cursor-0day-when-full-disclosure-becomes-the-only-protection-left
348•Synthetic7346•14h ago•160 comments

How I use HTMX with Go

https://www.alexedwards.net/blog/how-i-use-htmx-with-go
224•gnabgib•12h ago•55 comments

Solving 20 Erdős Problems with 20 Codex Accounts Running in Parallel

https://www.starfleetmath.com/
123•colin7snyder•8h ago•54 comments

Microsoft has released software updates to plug at least 570 security holes

https://krebsonsecurity.com/2026/07/microsoft-patches-a-record-570-security-flaws/
114•robin_reala•10h ago•58 comments

Surprising lessons from my research scientist job search

https://yongzx.github.io/blog/2026/06/24/job-search/
7•gmays•4d ago•1 comments

How to stop Claude from saying load-bearing

https://jola.dev/posts/how-to-stop-claude-from-saying-load-bearing
519•shintoist•20h ago•543 comments

I'm a USB-C Maximalist

https://shkspr.mobi/blog/2026/07/im-a-usb-c-maximalist/
268•speckx•17h ago•361 comments

Mathematical texts from a Maya site in Guatemala identify an ancient astronomer

https://www.nature.com/articles/d41586-026-02170-8
81•homarp•20h ago•21 comments

The kids with phones are alright

https://heatherburns.tech/2026/07/08/the-kids-with-phones-are-alright/
197•JumpCrisscross•3d ago•169 comments

The largest available Minecraft world, totalling 15 TB

https://2b2t.place/1million
211•_____k•3d ago•70 comments

The bread paradox: why convenience always wins, and why SaaS isn't doomed

https://www.joanwestenberg.com/p/the-bread-paradox-why-convenience
61•srijan4•1d ago•53 comments

LeMario: Training a JEPA World Model on Super Mario Bros

https://www.benjamin-bai.com/projects/lemario
89•kevinjosethomas•9h ago•11 comments

Ask HN: How do you track feedback when you post across multiple places?

3•georgi_94•14m ago•0 comments

Who's running all those tiny RPKI servers?

https://blog.apnic.net/2026/07/15/whos-running-all-those-tiny-rpki-servers/
4•enz•1h ago•0 comments

Launch HN: Agnost AI (YC S26) – Extract user feedback from agent conversations

https://agnost.ai
77•laalshaitaan•16h ago•40 comments

Probably check on your smart appliances

https://xeiaso.net/notes/2026/check-your-smart-tv/
61•xena•10h ago•21 comments

An unusual way for your DHCP server to run out of dynamic IPs

https://utcc.utoronto.ca/~cks/space/blog/sysadmin/DHCPServerAndScreamingHost
65•speckx•4d ago•15 comments

The Estranged Worlds of J. G. Ballard

https://lareviewofbooks.org/article/jg-ballard-illuminated-man-christopher-priest-nina-allan/
56•Caiero•1d ago•12 comments

Your 'app' could have been a webpage (so I fixed it for you)

https://danq.me/2026/07/09/your-app-could-have-been-a-webpage/
795•MrVandemar•4d ago•474 comments

Are we offloading too much of our thinking to AI?

https://www.artfish.ai/p/offloading-thinking-to-ai
457•yenniejun111•17h ago•420 comments

C++20 Improved the For-Loop Syntax

https://lzon.ca/posts/tips/cpp-for-range-init/
37•jpmitchell•3d ago•49 comments
Open in hackernews

RISC-V Is Inevitable: State of the Union Keynote Argues

https://www.eetimes.com/risc-v-is-inevitable-state-of-the-union-keynote-argues/
38•signa11•2h ago

Comments

ColdStream•1h ago
It was a decent little talk this one. Now that we are seeing RVA23 chips available we are starting to at least see a lot of software packages actively compiled for the platform. They aren't optimized much at all but they do run.

I am cautiously optimistic about the future of RISC-V. It is likely to start biting at the heals of ARM in another 5 years or so, and having no licensing fees makes it very attractive in that sense. Qualcomm and Apple will be very interesting in avoiding as many ARM licensing fees as possible even if initially in embedded systems. But it also allows for a lot of hardware to be locked down just like ARM and so it might not be so great for the end users. Time will tell.

All I know is that I look for the seeing Apple Silicon 2 launching in 2036 using this stuff. ;)

random3•1h ago
Can you elaborate on

> But it also allows for a lot of hardware to be locked down just like ARM

Joel_Mckay•34m ago
Many of the underlying IP areas of RISK-V advanced features are not public implementations.

Yet there are still a lot of great projects around, that may end up in China grey market chip fabs at some point.

https://github.com/vortexgpgpu/vortex

ARM64/AArch64 is about constrained consistency, but most RISCV standards groups still fail to recognize their ISA version fragmentation was a serious mistake. So no, it won't exist outside niche use-cases until the kids stop arguing over what RISCV even means in a general end-user context (example: BOOM flags.) =3

pantalaimon•16m ago
We still have to see a RISC-V implementation that comes even close to the performance of ARM
cold_pizz4•46m ago
While the consumer market is still years away from widespread RISC-V adoption, if you pay attention to the embedded / MCU market (especially Espressif & co) you will indeed come to the conclusion that RISC-V is inevitable and software maturity will probably come from these early adopters.

Go!

rwmj•28m ago
Krste wasn't even saying anything controversial. It's obvious that manufacturers will use the cheapest (free) least legally entangled option, and that this adoption will happen first amongst those with the tightest margins. And - Clayton's law[1] - it will eventually extend to the rest of the market (albeit over a very long time).

https://en.wikipedia.org/wiki/Clayton_Christensen

incrudible•3m ago
The good RISC-V designs are not free though and the free ones are not good. MCUs are not a category of computer to draw lessons from for the broader market.
oblio•5m ago
I wouldn't bet against software inertia.

x86 only missed the mobile market because of multiple bad business decisions, otherwise ARM (and RISC architectures overall) would have been relegated to more decades as backwater architectures.

There is nothing inevitable about anything as Apple controls its own silicon very tightly, Microsoft hasn't even really transitioned away from x86, and Android probably isn't very keen to transition away from ARM.

Now, embedded markets are different but they've always been different and the number of embedded programmers is dwarfed by non embedded programmers and regular users will for a long time never install an app on RISC-V.

It's an interesting journey, let's see where it takes us in 20 years.

modulovalue•20m ago
I'm working on making SIMD better in Dart. Dart supports RISC-V as a target architecture for compilation, but I'm not really excited about figuring out how to map the wasm-SIMD-style primitives to RISC-V's RVV and so I don't really plan to look into it at all.

This is mostly because their approach to SIMD is so different, but also because I can't test it at all. Are there any RISC-V "machines"? that one can use to do something useful or fun with that someone here could recommend?

I guess it would be fun seeing all my SIMD-fiable use-cases become orders of magnitude faster on RISC-V, too, but I sadly never hear anything about machines that use RISC-V.

aarroyoc•8m ago
There are several RISC-V machines. In the microcontroller world it's becoming more and more usual, but those won't have RVV. SpacemiT K3 based machines are probably your best bet when it comes to RISC-V processors with SIMD support. There are several manufacturers: Milk-V with the Jupiter II, Sipeed, Banana Pi, ...
jhvkjhk•15m ago
> “CHERI is not an extension; CHERI is a new base,” Asanović clarified to the keynote audience.

> Addressing concerns that creating a new base ISA might fracture the open-source community, Asanović offered a devoted defense to EE Times. “CHERI is too invasive to be a simple extension on regular RISC-V, and so needs a new base ISA for that reason,”

To me it sounds like they're creating RISC-VI before RISC-V even winning the market.

rwmj•6m ago
There's zero chance CHERI will go anywhere, I wouldn't worry about it.