It's still inconceivable to me how people developed for these platforms.

A good discussion about the setup for Manic Miner by the author is here:

https://www.youtube.com/watch?v=LymCezUg7HI

There is some bug in the article, because it shows:

MD content is not available

We can probably trace a ton of greatly influential programmers back to Sinclair machines (Linus Torvalds used a Sinclair QL for example, I think Demis Hasabis had a Speccy.. maybe), but the original ZX Spectrum 48k stands separate from all the rest. The whole hardware architecture was a series of hacks to make the machine as cheap as possible. A few fascinating facts that come to mind:

(1) the 48k Speccy had a total of ..96KiB of memory: 16KiB of "proper" DRAM, 16KiB of ROM for its BASIC and ..64KiB of DRAM of which half of was non-functional! Sinclair was buying broken memory chips and binning them to get sets whose either the top or the bottom 32KiB worked. They could get these chips for way cheaper. Each machine would have a jumper to select either the top or the bottom 32KiB working region.

(2) Both the "graphics card" chip (the ULA, or Uncommitted Logic Array, an early form of an FPGA) and the Z80 CPU needed to read from memory. Instead of having multiplexers, the ZX Spectrum just connected the two address buses with resistors, such that the ULA would overpower the Z80 if both tried to set an address to read from. The CPU was completely unaware of this: the ULA would ..freeze its clock signal for a few clock cycles, do its thing, and then let the CPU continue with its read. It was actually slower to read from a specific region of RAM that contained the framebuffer because of this.

(3) the article describes the weird out-of-order memory layout for the screen. The reason it was done this way was because of the 4116 DRAM chips the machine was using. These were 16,384 (2^14) 1-bit memories, arranged in 2^7 rows and 2^7 columns. To address a random location, one would need to first clock in the 7-bit row, followed by clocking in the 7-bit column. If you wanted to access consecutive memory locations with the same row address, the chips had a "fast page mode", where you would only need to clock in the next 7-bit column address. The memory was laid out in such a way that would minimize row address settings.

Hacks, all the way down to the core.